linux-kernel - Re: [PATCH V5 09/18] MIPS: Loongson: Add swiotlb to support big memory (>4GB).

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Date:	Tue, 14 Aug 2012 09:26:36 -0700
From:	David Daney <ddaney@...iumnetworks.com>
To:	Huacai Chen <chenhuacai@...il.com>
CC:	Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
	Ralf Baechle <ralf@...ux-mips.org>,
	<linux-mips@...ux-mips.org>, <linux-kernel@...r.kernel.org>,
	Fuxin Zhang <zhangfx@...ote.com>,
	Zhangjin Wu <wuzhangjin@...il.com>,
	Hongliang Tao <taohl@...ote.com>, Hua Yan <yanh@...ote.com>
Subject: Re: [PATCH V5 09/18] MIPS: Loongson: Add swiotlb to support big memory
 (>4GB).

On 08/13/2012 10:57 PM, Huacai Chen wrote:
> Hi, David,
>
> Seems like you are the original author of code in
> arch/mips/cavium-octeon/dma-octeon.c. Could you please tell me why we
> need mb() in alloc_coherent(), map_page(), map_sg()? It seems like
> because of cache coherency (CPU write some data, then map the page for
> a device, if without mb(), then device may read wrong data.) but I'm
> not sure.
>

That is essentially correct.

The DMA API requires certain memory barrier semantics.  These are 
achieved with the mb() in the OCTEON code.

> On Tue, Aug 14, 2012 at 1:54 AM, Konrad Rzeszutek Wilk
> <konrad.wilk@...cle.com>  wrote:
>>> +static void *loongson_dma_alloc_coherent(struct device *dev, size_t size,
>>> +                             dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs)

I know nothing about Loongson, so I cannot comment on what is required 
for it.

David Daney

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