linux-kernel - Re: [PATCHv2 4/6] dw_dmac: autoconfigure block

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Date:	Fri, 21 Sep 2012 21:00:06 +0530
From:	Viresh Kumar <viresh.kumar@...aro.org>
To:	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc:	Vinod Koul <vinod.koul@...el.com>, spear-devel@...t.st.com,
	linux-kernel@...r.kernel.org, Hein Tibosch <hein_tibosch@...oo.es>
Subject: Re: [PATCHv2 4/6] dw_dmac: autoconfigure block_size or use platform data

On 21 September 2012 20:39, Andy Shevchenko
<andriy.shevchenko@...ux.intel.com> wrote:
> On Fri, 2012-09-21 at 19:30 +0530, viresh kumar wrote:
>> On Fri, Sep 21, 2012 at 5:35 PM, Andy Shevchenko
>> <andriy.shevchenko@...ux.intel.com> wrote:
>> > diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
>> > @@ -1385,6 +1375,7 @@ static int __devinit dw_probe(struct platform_device *pdev)
>>
>> > +       /* get hardware configuration parameters */
>> > +       if (autocfg)
>> > +               max_blk_size = dma_readl(dw, MAX_BLK_SIZE);
>> > +
>>
>> Why don't you do above with the below ++ code
>>
>> >         /* Calculate all channel mask before DMA setup */
>> >         dw->all_chan_mask = (1 << nr_channels) - 1;
>> >
>> > @@ -1470,6 +1465,16 @@ static int __devinit dw_probe(struct platform_device *pdev)
>> >                 INIT_LIST_HEAD(&dwc->free_list);
>> >
>> >                 channel_clear_bit(dw, CH_EN, dwc->mask);
>> > +
>> > +               /* hardware configuration */
>> > +               if (autocfg)
>> > +                       /* Decode maximum block size for given channel. The
>> > +                        * stored 4 bit value represents blocks from 0x00 for 3
>> > +                        * up to 0x0a for 4095. */
>>
>> i.e. here?
> Because there is only one register, but we have loop for channels. Shall
> we read the same register as many times as amount of channels we have?

Obviously not :)
I misread the code.

Acked-by: Viresh Kumar <viresh.kumar@...aro.org>
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