lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Sun, 21 Oct 2012 23:45:08 +0900
From:	anish kumar <anish198519851985@...il.com>
To:	Thomas Gleixner <tglx@...utronix.de>
Cc:	"Liu, Chuansheng" <chuansheng.liu@...el.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] genirq: for edge interrupt IRQS_ONESHOT support with
 irq thread

On Sat, 2012-10-13 at 14:21 +0900, anish kumar wrote:
> On Fri, 2012-10-12 at 22:52 +0200, Thomas Gleixner wrote:
> > On Fri, 12 Oct 2012, Liu, Chuansheng wrote:
> > > > -----Original Message-----
> > > > From: anish kumar [mailto:anish198519851985@...il.com]
> > > > Sent: Friday, October 12, 2012 11:25 PM
> > > > To: Liu, Chuansheng
> > > > Cc: Thomas Gleixner; linux-kernel@...r.kernel.org
> > > > Subject: RE: [PATCH] genirq: for edge interrupt IRQS_ONESHOT support with irq
> > > > thread
> > > > 
> > > > On Fri, 2012-10-12 at 14:57 +0000, Liu, Chuansheng wrote:
> > > > > > On SMP an interrupt which is raised after the ack() again before the
> > > > > > handler finishes, can invoke another delivery on a different CPU,
> > > > > > which then sees the IRQ_INPROGESS flag, masks it and flags it
> > > > > > PENDING. When the primary handler on the first CPU returns, it sees
> > > > > > the PENDING flag, unmasks and invokes the handler another time.
> > > > > In this case, when IRQ_INPROGRESS flag is set, on another CPU, it will
> > > > > mask and ack it, if before the primary handler on the first CPU returns,
> > > > > the edge interrupt is raised again, it will be lost, right?
> > > > Why will the interrupt be raised again?Is not it masked?I read tglx
> > > I means because it is masked, if at this time device issues edge irq,
> > > It will not be delivered and lost.
> > 
> > No, it is NOT lost. The irq is marked PENDING already, so we invoke
> It is fairly easy for an edge triggered interrupt to be missed - for
> example if interrupts have to be masked for a period - and unless there
> is some type of hardware latch that records the event it is impossible
> to recover.
> tglx, explanation will only work if we have a hardware latch which when
> unmasked sends all those edge interrupts again (which had come when it
> was masked while the CPU was handling the same interrupts).
> 
> PS:http://kernel.org/doc/htmldocs/genericirq.html
Hello tglx,
Does this explanation makes sense?
> > the handler again and handle it. And before we invoke the handler
> > another time we unmask it.
> > 
> > It does not matter at all whether the interrupt has been sent five
> > times while it was masked. What matters is that we recorded the first
> > one and set the PENDING flag. That way we invoke the interrupt handler
> > again and keep stuff rolling.
> > 
> > Thanks,
> > 
> > 	tglx
> 


--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ