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Date:	Mon, 19 Nov 2012 18:46:15 +0100
From:	Samuel Ortiz <sameo@...ux.intel.com>
To:	Peter Hurley <peter@...leysoftware.com>
Cc:	Peter Tyser <ptyser@...-inc.com>, linux-kernel@...r.kernel.org,
	Aaron Sierra <asierra@...-inc.com>
Subject: Re: [PATCH v3] mfd: lpc_ich: Fix resource request for [mem
 0x00000000]

Hi Peter,

On Fri, Nov 09, 2012 at 06:55:29AM -0500, Peter Hurley wrote:
> The older southbridges supported by the lpc_ich driver do not
> provide memory-mapped space of the root complex. The driver
> correctly avoids computing the iomem address in this case, yet
> submits a zeroed resource request anyway (via mfd_add_devices()).
> 
> Remove the iomem resource from the resource array submitted to the
> mfd core for the older southbridges.
> 
> Acked-by: Aaron Sierra <asierra@...-inc.com>
> Cc: Peter Tyser <ptyser@...-inc.com>
> Cc: Samuel Ortiz <sameo@...ux.intel.com>
> Signed-off-by: Peter Hurley <peter@...leysoftware.com>
> ---
> 
> v2: post-decrement to match existing style
>     retitle patch subject
> v3: respin as standalone patch
> 
>  drivers/mfd/lpc_ich.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
> index a22544f..f507c09 100644
> --- a/drivers/mfd/lpc_ich.c
> +++ b/drivers/mfd/lpc_ich.c
> @@ -842,6 +842,9 @@ static int __devinit lpc_ich_init_wdt(struct pci_dev *dev,
>  		res = wdt_mem_res(ICH_RES_MEM_GCS);
>  		res->start = base_addr + ACPIBASE_GCS_OFF;
>  		res->end = base_addr + ACPIBASE_GCS_END;
> +	} else {
So I suppose there is no v3 for the iTCO ? If we're expecting all versions
after 1 to have a memory mapped region, we should have something like:

--- a/drivers/mfd/lpc_ich.c
+++ b/drivers/mfd/lpc_ich.c
@@ -830,7 +830,10 @@ static int __devinit lpc_ich_init_wdt(struct pci_dev
*dev,
         * we have to read RCBA from PCI Config space 0xf0 and use
         * it as base. GCS = RCBA + ICH6_GCS(0x3410).
         */
-       if (lpc_chipset_info[id->driver_data].iTCO_version == 2) {
+       if (lpc_chipset_info[id->driver_data].iTCO_version == 1) {
+               /* Don't register iomem for TCO ver 1 */
+               lpc_ich_cells[LPC_WDT].num_resources--;
+       } else {
                pci_read_config_dword(dev, RCBABASE, &base_addr_cfg);
                base_addr = base_addr_cfg & 0xffffc000;
                if (!(base_addr_cfg & 1)) {

Cheers,
Samuel.

-- 
Intel Open Source Technology Centre
http://oss.intel.com/
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