linux-kernel - Re: [PATCH] ARM: ftrace: Ensure code modifications are synchronised across all cpus

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Date:	Mon, 10 Dec 2012 11:24:08 +0000
From:	Will Deacon <will.deacon@....com>
To:	"Jon Medhurst (Tixy)" <tixy@...aro.org>
Cc:	Steven Rostedt <rostedt@...dmis.org>,
	Russell King - ARM Linux <linux@....linux.org.uk>,
	Frederic Weisbecker <fweisbec@...il.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Rabin Vincent <rabin@....in>, Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...ux.intel.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] ARM: ftrace: Ensure code modifications are synchronised
 across all cpus

On Mon, Dec 10, 2012 at 11:04:05AM +0000, Jon Medhurst (Tixy) wrote:
> On Fri, 2012-12-07 at 19:02 +0000, Will Deacon wrote:
> > For ARMv7, there are small subsets of instructions for ARM and Thumb which
> > are guaranteed to be atomic wrt concurrent modification and execution of
> > the instruction stream between different processors:
> > 
> > Thumb:	The 16-bit encodings of the B, NOP, BKPT, and SVC instructions.
> > ARM:	The B, BL, NOP, BKPT, SVC, HVC, and SMC instructions.
> > 
> 
> So this means for things like kprobes which can modify arbitrary kernel
> code we are going to need to continue to always use some form of
> stop_the_whole_system() function?
> 
> Also, kprobes currently uses patch_text() which only uses stop_machine
> for Thumb2 instructions which straddle a word boundary, so this needs
> changing?

Yes; if you're modifying instructions other than those mentioned above, then
you'll need to synchronise the CPUs, update the instructions, perform
cache-maintenance on the writing CPU and then execute an isb on the
executing core (this last bit isn't needed if you're going to go through an
exception return to get back to the new code -- depends on how your
stop/resume code works).

For ftrace we can (hopefully) avoid a lot of this when we have known points
of modification.

Will
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