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Date:	Wed, 30 Jan 2013 14:33:02 +0530
From:	Mugunthan V N <mugunthanvnm@...com>
To:	Pantelis Antoniou <panto@...oniou-consulting.com>
CC:	Richard Cochran <richardcochran@...il.com>,
	Matt Porter <mporter@...com>,
	Chase Maupin <chase.maupin@...com>, Jason Kridner <jdk@...com>,
	Tony Lindgren <tony@...mide.com>, <linux-omap@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] cpsw: Fix interrupt storm among other things

On 1/30/2013 2:06 PM, Pantelis Antoniou wrote:
> Hi Mugunthan,
>
> On Jan 29, 2013, at 1:45 PM, Mugunthan V N wrote:
>
>> On 1/28/2013 6:41 PM, Pantelis Antoniou wrote:
>>> Fix interrupt storm on bone A4 cause by non-by-the-book interrupt handling.
>>> While at it, added a non-NAPI mode (which is easier to debug), plus
>>> some general fixes.
>>>
>>> Signed-off-by: Pantelis Antoniou <panto@...oniou-consulting.com>
>>> ---
>>>   Documentation/devicetree/bindings/net/cpsw.txt |   1 +
>>>   drivers/net/ethernet/ti/cpsw.c                 | 222 +++++++++++++++++++++----
>>>   drivers/net/ethernet/ti/davinci_cpdma.c        |   4 +-
>>>   drivers/net/ethernet/ti/davinci_cpdma.h        |   2 +-
>>>   include/linux/platform_data/cpsw.h             |   1 +
>>>   5 files changed, 194 insertions(+), 36 deletions(-)
>> I have tested CPSW on AM335x EVM 1.5A with flood ping and i am not
>> seeing any interrupt storm.
>> Can you provide more details on how to reproduce the issue.
>>
> A beaglebone prototype with the new silicon version, with the ethernet errata
> fixed displays this. You can't trigger it on old silicon.
>
> The TI people on the CC list can confirm.
But i have the same silicon revision (PG2.0) in my EVM and I am not 
seeing any issues. Can you
point me to the ethernet errata which you are mentioning?

Regards
Mugunthan V N
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