linux-kernel - Re: [PATCH] ARM: bcm2835: override the HW UART periphid

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Date:	Tue, 21 May 2013 10:34:17 -0600
From:	Stephen Warren <swarren@...dotorg.org>
To:	Jongsung Kim <neidhard.kim@....com>
CC:	linux@....linux.org.uk, gregkh@...uxfoundation.org, jslaby@...e.cz,
	linux-serial@...r.kernel.org, linux-rpi-kernel@...ts.infradead.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] ARM: bcm2835: override the HW UART periphid

On 05/21/2013 12:02 AM, Jongsung Kim wrote:
> Stephen Warren reported the recent commit 78506f2 (add support for
> extended FIFO-size of PL011-r1p5) breaks the serial port on the
> BCM2835 ARM SoC.
> 
> A UART compatible with the ARM PL011-r1p5 should have 32-deep FIFOs.
> The BCM2835 UART just looks like an ARM PL011-r1p5, but has 16-deep
> FIFOs just like PL011-r1p4 or earlier revisions. As a workaround for
> this compatibility issue, this patch overrides the HW UART periphid
> register values with the actually compatible UART periphid 0x00241011
> (r1p3 or r1p4).
> 
> Reported-by: Stephen Warren <swarren@...dotorg.org>
> Signed-off-by: Jongsung Kim <neidhard.kim@....com>

I know this will work, because I tried out the same thing last week.

However, I'm not convinced that it's the correct approach. What other
changes exist between r1p4 and r1p5; can you check in the TRM? Faking
the periphid would prevent the driver from taking account of any other
changes. Should we instead add a DT property solely to override the FIFO
size, and then set that for bcm2835? I guess if there really aren't any
other SW-visible changes in r1p5, this approach is fine.
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