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Date:	Mon, 17 Jun 2013 08:34:05 -0700
From:	Jon Mason <jon.mason@...el.com>
To:	Andy Shevchenko <andy.shevchenko@...il.com>
Cc:	Jubin Mehta <jubin.mehta@...el.com>,
	Vinod Koul <vinod.koul@...el.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Dan Williams <djbw@...com>,
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	Dave Jiang <dave.jiang@...el.com>
Subject: Re: [PATCH] dmatest: masking tests for channel capabilities

On Mon, Jun 17, 2013 at 11:59:00AM +0300, Andy Shevchenko wrote:
> On Thu, Jun 13, 2013 at 8:24 PM, Jubin Mehta <jubin.mehta@...el.com> wrote:
> > The current dmatest module tests all the hardware capabilities (MEMCPY, XOR
> > and PQ) supported by a particular DMA channel and these tests are performed
> > concurrently by default. This patch allows the user to enable or disable the
> > test performed for any particular capability. The mask bits for enabling the
> > tests are set using the debugfs.
> 
> This approach I like better.
> Dan, Vinod, what is your opinion?

I withdraw my path in favor of this one.

Thanks,
Jon

> I have couple of comments below.
> 
> > +++ b/Documentation/dmatest.txt
> 
> > +Method to enable the capabilities:
> > +
> > +PATH = /sys/kernel/debug/dmatest/cap_mask
> > +(DEFAULT) echo 0x07 > $PATH     // Set Bits 0,1,2 for MEMCPY, XOR and PQ
> > +          echo 0x01 > $PATH     // Set bit 0 to enable MEMCPY
> > +          echo 0x02 > $PATH     // Set bit 1 to enable XOR
> > +          echo 0x04 > $PATH     // Set bit 2 to enable PQ
> 
> What if we make examples  followed by # and comments?
> And move (DEFAULT) to the commentary.
> 
> > +++ b/drivers/dma/dmatest.c
> 
> > +/*
> > + * Capability Mask Bits.The bits in the cap_mask denote the masking of
> > + * the hardware capabilities of the dma channel.
> > + *
> > + * DMA_CAP_MEMCPY:  Bit 0 for enabling DMA_MEMCPY capability
> > + * DMA_CAP_XOR:     Bit 1 for enabling DMA_XOR capabilit
> > + * DMA_CAP_PQ:      Bit 2 for enabling DMA_PQ capability
> > + * DMA_CAP_ALL:     Enable all the capabilities of the channel
> > + */
> > +#define DMA_CAP_MEMCPY         (1 << 0)
> > +#define DMA_CAP_XOR            (1 << 1)
> > +#define DMA_CAP_PQ             (1 << 2)
> 
> Can we reuse DMA_MEMCPY and so on from enum dma_transaction_type?
> 
> --
> With Best Regards,
> Andy Shevchenko
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