linux-kernel - linux-next: manual merge of the v4l-dvb tree with Linus' tree

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Date:	Thu, 29 Aug 2013 12:48:14 +1000
From:	Stephen Rothwell <sfr@...b.auug.org.au>
To:	Mauro Carvalho Chehab <mchehab@...radead.org>
Cc:	linux-next@...r.kernel.org, linux-kernel@...r.kernel.org,
	Sergei Shtylyov <sergei.shtylyov@...entembedded.com>,
	Simon Horman <horms+renesas@...ge.net.au>,
	Vladimir Barinov <vladimir.barinov@...entembedded.com>
Subject: linux-next: manual merge of the v4l-dvb tree with Linus' tree

Hi Mauro,

Today's linux-next merge of the v4l-dvb tree got a conflict in
arch/arm/mach-shmobile/board-bockw.c between commit fa3e0cee12fb ("ARM:
shmobile: BOCK-W: fix SDHI0 PFC settings") from Linus' tree and commit
9c43952d0f1e ("[media] ARM: shmobile: BOCK-W: add VIN and ML86V7667
support") from the v4l-dvb tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@...b.auug.org.au

diff --cc arch/arm/mach-shmobile/board-bockw.c
index 3354a85,7d44f66..0000000
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@@ -167,13 -188,17 +188,23 @@@ static const struct pinctrl_map bockw_p
  				  "usb1", "usb1"),
  	/* SDHI0 */
  	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
 -				  "sdhi0", "sdhi0"),
 +				  "sdhi0_data4", "sdhi0"),
 +	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
 +				  "sdhi0_ctrl", "sdhi0"),
 +	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
 +				  "sdhi0_cd", "sdhi0"),
 +	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
 +				  "sdhi0_wp", "sdhi0"),
+ 	/* VIN0 */
+ 	PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
+ 				  "vin0_clk", "vin0"),
+ 	PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
+ 				  "vin0_data8", "vin0"),
+ 	/* VIN1 */
+ 	PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
+ 				  "vin1_clk", "vin1"),
+ 	PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
+ 				  "vin1_data8", "vin1"),
  };
  
  #define FPGA	0x18200000

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