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Date:	Thu, 19 Sep 2013 17:14:24 +0200
From:	Michal Simek <monstr@...str.eu>
To:	Yves Vandervennet <rocket.yvanderv@...il.com>
CC:	monstr@...str.eu, Alan Tull <atull@...era.com>,
	Jason Gunthorpe <jgunthorpe@...idianresearch.com>,
	Jason Cooper <jason@...edaemon.net>,
	Michal Simek <michal.simek@...inx.com>,
	linux-kernel@...r.kernel.org, Pavel Machek <pavel@....cz>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Dinh Nguyen <dinguyen@...era.com>,
	Philip Balister <philip@...ister.org>,
	Alessandro Rubini <rubini@...dd.com>,
	Mauro Carvalho Chehab <m.chehab@...sung.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Cesar Eduardo Barros <cesarb@...arb.net>,
	Joe Perches <joe@...ches.com>,
	"David S. Miller" <davem@...emloft.net>,
	Stephen Warren <swarren@...dia.com>,
	Arnd Bergmann <arnd@...db.de>,
	David Brown <davidb@...eaurora.org>,
	Dom Cobley <popcornmix@...il.com>
Subject: Re: [RFC PATCH] fpga: Introduce new fpga subsystem

On 09/19/2013 04:42 PM, Yves Vandervennet wrote:
> HI Michal.,
> 
> 
> On Thu, Sep 19, 2013 at 5:55 AM, Michal Simek <monstr@...str.eu> wrote:
> 
>>
>>
>>>> Will this framework handle more than one fpga at a time?
>>
>>> I didn't tried that because I don't have any suitable hw for this on my
>> desk
>>> but I there shouldn't be any problem in that.
>>
> Supporting multiple FPGA's at one time is key.
> 
>>
>>>> Is there some way a per-device userspace helper can be added that can
>>>> handle adding the headers?  Such that different fpga types get different
>>>> helpers?
>>
>>> What do you exactly mean by that? Any example what do you want to achieve?
>>
> Bit streams may not be in raw format, so using 'cat' is not possible.
> Xilinx and Altera have their own bit stream "richer" format, that can need
> to be processed before they are presented to the driver(s). So, a hotplug
> helper per manufacturer/FPGA is required. Assuming 'cat' will be used is
> too limited.
> Does it make sense to you?

Sure. We are handling this at the driver level but as I mentioned
previously these specific functions should be added to xilinx/altera.c file
(like crc checking mechanisms, etc).
Only one question remain which is if this driver should provide any hook
for this functions or these functions should be called in the end driver.

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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