linux-kernel - Re: [PATCH v10 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

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Date:	Mon, 23 Sep 2013 11:04:39 -0600
From:	Stephen Warren <swarren@...dotorg.org>
To:	hongbo.zhang@...escale.com
CC:	rob.herring@...xeda.com, pawel.moll@....com, mark.rutland@....com,
	ian.campbell@...rix.com, vinod.koul@...el.com, djbw@...com,
	devicetree@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v10 2/3] DMA: Freescale: Add new 8-channel DMA engine
 device tree nodes

On 09/18/2013 04:15 AM, hongbo.zhang@...escale.com wrote:
> From: Hongbo Zhang <hongbo.zhang@...escale.com>
> 
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
> the device tree nodes for them.

> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt

> +Required properties:
> +
> +- compatible        : must include "fsl,elo3-dma"
> +- reg               : DMA General Status Registers, i.e. DGSR0 which contains
> +                      status for channel 1~4, and DGSR1 for channel 5~8

Is that a single entry, which is large enough to cover both registers,
or a pair of entries, one per register? Reading the text, I might assume
the former, but looking at the examples, it's the latter.

...
 +Example:
> +dma@...300 {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	compatible = "fsl,elo3-dma";
> +	reg = <0x100300 0x4>,
> +	      <0x100600 0x4>;

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