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Date:	Mon, 07 Oct 2013 08:07:00 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	monstr@...str.eu, Michal Simek <monstr@...str.eu>
CC:	Jason Gunthorpe <jgunthorpe@...idianresearch.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Pavel Machek <pavel@...x.de>,
	Michal Simek <michal.simek@...inx.com>,
	linux-kernel@...r.kernel.org, Alan Tull <atull@...era.com>,
	Dinh Nguyen <dinguyen@...era.com>,
	Philip Balister <philip@...ister.org>,
	Alessandro Rubini <rubini@...dd.com>,
	Steffen Trumtrar <s.trumtrar@...gutronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	Yves Vandervennet <rocket.yvanderv@...il.com>,
	Kyle Teske <kyle.teske@...com>,
	Josh Cartwright <joshc@....teric.us>,
	Nicolas Pitre <nico@...aro.org>,
	Mark Langsdorf <mark.langsdorf@...xeda.com>,
	Felipe Balbi <balbi@...com>, linux-doc@...r.kernel.org,
	Mauro Carvalho Chehab <m.chehab@...sung.com>,
	David Brown <davidb@...eaurora.org>,
	Rob Landley <rob@...dley.net>,
	"David S. Miller" <davem@...emloft.net>,
	Joe Perches <joe@...ches.com>,
	Cesar Eduardo Barros <cesarb@...arb.net>,
	Samuel Ortiz <sameo@...ux.intel.com>,
	Andrew Morton <akpm@...ux-foundation.org>
Subject: Re: [RFC PATCH v2 0/1] FPGA subsystem core

Special soft IP presenting a PCI device to the host.

Michal Simek <monstr@...str.eu> wrote:
>On 10/07/2013 04:55 PM, H. Peter Anvin wrote:
>> If I recall correctly we simply poked at the FPGA directly from
>userspace. 
>Not ideal by any means and also meant we had to have a backup recovery
>mechanism as it meant
>that the FPGA had to be programmed already as the bus interface was in
>soft IP.
>
>ok. How was that physical hardware connection to device you wanted to
>talk?
>Was it any special IP with MMIO? Or gpio jtag emulation or similar?
>
>Thanks,
>Michal

-- 
Sent from my mobile phone.  Please pardon brevity and lack of formatting.
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