linux-kernel - [PATCH 2/2] Add RTM C intrinsics head file For new instruction

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Date:	Sun, 15 Dec 2013 11:45:48 +0800
From:	Luming Yu <luming.yu@...il.com>
To:	linux-kernel@...r.kernel.org
Cc:	Luming Yu <luming.yu@...il.com>
Subject: [PATCH 2/2] Add RTM C intrinsics head file For new instruction

XBEGIN, XEND, XABORT, XTEST to enable kernel to explore the value of
Restricted Transactional Memory that can be found on your haswell laptop and
following up offerings see Chapter 12.3.3 Using HLE or RTM for lock Elision
of 64-ia-32-architectures-optimization-manual.pdf July 2013

Tested-by: Luming Yu <luming.yu@...el.com>
Signed-off-by: Luming Yu <luming.yu@...el.com>
Signed-off-by: Andi Kleen <ak@...ux.intel.com
---
 arch/x86/include/asm/rtm.h | 58 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 arch/x86/include/asm/rtm.h

diff --git a/arch/x86/include/asm/rtm.h b/arch/x86/include/asm/rtm.h
new file mode 100644
index 0000000..5841914
--- /dev/null
+++ b/arch/x86/include/asm/rtm.h
@@ -0,0 +1,58 @@
+#ifndef _RTM_H
+#define _RTM_H 1
+
+/*
+ * Copyright (c) 2012,2013 Intel Corporation
+ * Author: Andi Kleen
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+
+/* Official RTM intrinsics interface matching gcc/icc, but works
+   on older gcc compatible compilers and binutils. */
+
+#define _XBEGIN_STARTED		(~0u)
+#define _XABORT_EXPLICIT	(1 << 0)
+#define _XABORT_RETRY		(1 << 1)
+#define _XABORT_CONFLICT	(1 << 2)
+#define _XABORT_CAPACITY	(1 << 3)
+#define _XABORT_DEBUG		(1 << 4)
+#define _XABORT_NESTED		(1 << 5)
+#define _XABORT_CODE(x)		(((x) >> 24) & 0xff)
+
+#define __rtm_force_inline __attribute__((__always_inline__)) inline
+
+static __rtm_force_inline int _xbegin(void)
+{
+	int ret = _XBEGIN_STARTED;
+	asm volatile(".byte 0xc7,0xf8 ; .long 0" : "+a" (ret) :: "memory");
+	return ret;
+}
+
+static __rtm_force_inline void _xend(void)
+{
+	 asm volatile(".byte 0x0f,0x01,0xd5" ::: "memory");
+}
+
+static __rtm_force_inline void _xabort(const unsigned int status)
+{
+	asm volatile(".byte 0xc6,0xf8,%P0" :: "i" (status) : "memory");
+}
+
+static __rtm_force_inline int _xtest(void)
+{
+	unsigned char out;
+	asm volatile(".byte 0x0f,0x01,0xd6 ; setnz %0" : "=r" (out) :: "memory");
+	return out;
+}
+
+#endif
-- 
1.8.1.4

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