linux-kernel - [PATCH v7 10/15] agp/intel: Use pci_bus

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Date:	Mon, 06 Jan 2014 17:56:24 -0700
From:	Bjorn Helgaas <bhelgaas@...gle.com>
To:	linux-pci@...r.kernel.org, Daniel Vetter <daniel.vetter@...ll.ch>
Cc:	David Airlie <airlied@...ux.ie>, Yinghai Lu <yinghai@...nel.org>,
	Guo Chao <yan@...ux.vnet.ibm.com>, linux-kernel@...r.kernel.org
Subject: [PATCH v7 10/15] agp/intel: Use pci_bus_address() to get GTTADR bus
 address

Per the Intel 915G/915GV/... Chipset spec (document number 301467-005),
GTTADR is a standard PCI BAR.

The PCI core reads GTTADR at enumeration-time.  Use pci_bus_address()
instead of reading it again in the driver.  This works correctly for both
32-bit and 64-bit BARs.  The spec above only mentions 32-bit GTTADR, but we
should still use the standard interface.

Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>
---
 drivers/char/agp/intel-agp.h |    2 +-
 drivers/char/agp/intel-gtt.c |    7 +++----
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 18bbaafb8509..fda073dcd967 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -115,7 +115,7 @@
 /* intel 915G registers */
 #define I915_GMADR_BAR	2
 #define I915_MMADR_BAR	0
-#define I915_PTEADDR	0x1C
+#define I915_PTE_BAR	3
 #define I915_GMCH_GMS_STOLEN_48M	(0x6 << 4)
 #define I915_GMCH_GMS_STOLEN_64M	(0x7 << 4)
 #define G33_GMCH_GMS_STOLEN_128M	(0x8 << 4)
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 58916f32c0f3..dd8b66a617dc 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1102,7 +1102,7 @@ static void i965_write_entry(dma_addr_t addr,
 
 static int i9xx_setup(void)
 {
-	u32 reg_addr, gtt_addr;
+	u32 reg_addr;
 	int size = KB(512);
 
 	reg_addr = pci_bus_address(intel_private.pcidev, I915_MMADR_BAR);
@@ -1113,9 +1113,8 @@ static int i9xx_setup(void)
 
 	switch (INTEL_GTT_GEN) {
 	case 3:
-		pci_read_config_dword(intel_private.pcidev,
-				      I915_PTEADDR, &gtt_addr);
-		intel_private.gtt_phys_addr = gtt_addr;
+		intel_private.gtt_phys_addr =
+			pci_bus_address(intel_private.pcidev, I915_PTE_BAR);
 		break;
 	case 5:
 		intel_private.gtt_phys_addr = reg_addr + MB(2);

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