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Date: Fri, 17 Jan 2014 20:25:10 +0800
From: Hanjun Guo <hanjun.guo@...aro.org>
To: "Rafael J. Wysocki" <rjw@...ysocki.net>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Russell King - ARM Linux <linux@....linux.org.uk>
Cc: linux-acpi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Grant Likely <grant.likely@...aro.org>,
Matthew Garrett <mjg59@...f.ucam.org>,
Olof Johansson <olof@...om.net>,
Linus Walleij <linus.walleij@...aro.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Arnd Bergmann <arnd@...db.de>, patches@...aro.org,
linux-kernel@...r.kernel.org, linaro-kernel@...ts.linaro.org,
linaro-acpi@...ts.linaro.org, Charles.Garcia-Tobin@....com,
Hanjun Guo <hanjun.guo@...aro.org>
Subject: [PATCH 16/20] ACPI / GIC: Initialize GIC using the information in MADT
In MADT table, there are GIC cpu interface base address and
GIC distributor base address, use them to convert GIC to ACPI.
Only GICC and GICD are described in ACPI 5.0, and only one GIC
is supported at now.
Signed-off-by: Hanjun Guo <hanjun.guo@...aro.org>
---
arch/arm64/kernel/irq.c | 6 ++++
drivers/acpi/plat/arm-core.c | 64 ++++++++++++++++++++++++++++++++++++------
include/linux/acpi.h | 6 ++++
3 files changed, 68 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
index 473e5db..490d971 100644
--- a/arch/arm64/kernel/irq.c
+++ b/arch/arm64/kernel/irq.c
@@ -25,6 +25,7 @@
#include <linux/irq.h>
#include <linux/smp.h>
#include <linux/init.h>
+#include <linux/acpi.h>
#include <linux/irqchip.h>
#include <linux/seq_file.h>
#include <linux/ratelimit.h>
@@ -78,6 +79,11 @@ void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
void __init init_IRQ(void)
{
irqchip_init();
+
+ /* FIXME: need to fix GIC hardcoded here and find a scalable way */
+ if (!handle_arch_irq)
+ acpi_gic_init();
+
if (!handle_arch_irq)
panic("No interrupt controller found.");
}
diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c
index 22c8235..c4a7327 100644
--- a/drivers/acpi/plat/arm-core.c
+++ b/drivers/acpi/plat/arm-core.c
@@ -27,6 +27,7 @@
#include <linux/module.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
+#include <linux/irqchip/arm-gic.h>
#include <linux/bootmem.h>
#include <linux/smp.h>
@@ -210,6 +211,15 @@ acpi_parse_gic(struct acpi_subtable_header *header, const unsigned long end)
acpi_table_print_madt_entry(header);
/*
+ * As ACPI 5.0 said, the 64-bit physical address in GIC struct at
+ * which the processor can access this GIC. If provided, the
+ * “Local Interruptp controller Address” field in the MADT
+ * is ignored by OSPM.
+ */
+ if (processor->base_address)
+ acpi_lapic_addr = processor->base_address;
+
+ /*
* We need to register disabled CPU as well to permit
* counting disabled CPUs. This allows us to size
* cpus_possible_map more accurately, to permit
@@ -229,11 +239,26 @@ acpi_parse_gic(struct acpi_subtable_header *header, const unsigned long end)
return 0;
}
+/*
+ * Hard code here, we can not get memory size from MADT (but FDT does),
+ * this size can be refered from GICv2 spec
+ */
+#define GIC_DISTRIBUTOR_MEMORY_SIZE (SZ_4K)
+#define GIC_CPU_INTERFACE_MEMORY_SIZE (SZ_8K)
+
+/*
+ * ACPI 5.0 only provides information of GICC and GICD, use them
+ * to initialize GIC
+ */
static int __init
acpi_parse_gic_distributor(struct acpi_subtable_header *header,
const unsigned long end)
{
struct acpi_madt_generic_distributor *distributor = NULL;
+ void __iomem *dist_base, *cpu_base;
+
+ if (!IS_ENABLED(CONFIG_ARM_GIC))
+ return -ENODEV;
distributor = (struct acpi_madt_generic_distributor *)header;
@@ -242,6 +267,27 @@ acpi_parse_gic_distributor(struct acpi_subtable_header *header,
acpi_table_print_madt_entry(header);
+ /* GIC is initialised after page_init(), no need for early_ioremap */
+ dist_base = ioremap(distributor->base_address,
+ GIC_DISTRIBUTOR_MEMORY_SIZE);
+ if (!dist_base) {
+ pr_warn(PREFIX "unable to map gic dist registers\n");
+ return -ENOMEM;
+ }
+
+ /*
+ * acpi_lapic_addr is stored in acpi_parse_madt() or acpi_parse_gic(),
+ * so we can use it here for GIC init
+ */
+ cpu_base = ioremap(acpi_lapic_addr, GIC_CPU_INTERFACE_MEMORY_SIZE);
+ if (!cpu_base) {
+ iounmap(dist_base);
+ pr_warn(PREFIX "unable to map gic cpu registers\n");
+ return -ENOMEM;
+ }
+
+ gic_init(distributor->gic_id, -1, dist_base, cpu_base);
+
return 0;
}
@@ -423,19 +469,21 @@ static void __init acpi_process_madt(void)
* Parse MADT GIC cpu interface entries
*/
error = acpi_parse_madt_gic_entries();
- if (!error) {
- /*
- * Parse MADT GIC distributor entries
- */
- acpi_parse_madt_gic_distributor_entries();
- }
+ if (!error)
+ pr_info("Using ACPI for processor (GIC) configuration information\n");
}
- pr_info("Using ACPI for processor (GIC) configuration information\n");
-
return;
}
+int __init acpi_gic_init(void)
+{
+ /*
+ * Parse MADT GIC distributor entries
+ */
+ return acpi_parse_madt_gic_distributor_entries();
+}
+
/*
* To see PCSI is enabled or not.
*
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index da55da2..a2dbe67 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -106,6 +106,7 @@ char * __acpi_map_table (unsigned long phys_addr, unsigned long size);
void __acpi_unmap_table(char *map, unsigned long size);
int early_acpi_boot_init(void);
int acpi_boot_init (void);
+int acpi_gic_init(void);
void acpi_boot_table_init (void);
int acpi_mps_check (void);
int acpi_numa_init (void);
@@ -436,6 +437,11 @@ static inline int acpi_boot_init(void)
return 0;
}
+static inline int acpi_gic_init(void)
+{
+ return -ENODEV;
+}
+
static inline void acpi_boot_table_init(void)
{
return;
--
1.7.9.5
--
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