linux-kernel - AW: [PATCH 1/1] iMX gpio: Allow reading back of pin status if configured as gpio output

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Fri, 17 Jan 2014 22:27:10 +0000
From:	Waibel Georg <Georg.Waibel@...sor-technik.de>
To:	Gerhard Sittig <gsi@...x.de>
CC:	Linus Walleij <linus.walleij@...aro.org>,
	Alexandre Courbot <gnurou@...il.com>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: AW: [PATCH 1/1] iMX gpio: Allow reading back of pin status if
 configured as gpio output

> On Fri, Jan 17, 2014 at 14:11 +0000, Waibel Georg wrote:
> >
> > From cb384950a1153e856ec03109a5156e660a89bf6d Mon Sep 17 00:00:00 2001
> > From: Georg Waibel <georg.waibel@...sor-technik.de>
> > Date: Fri, 17 Jan 2014 14:51:38 +0100
> > Subject: [PATCH 1/1] iMX gpio: Allow reading back of pin status if configured
> >  as gpio output
> >
> > Register PSR was used to read the pin status in the mxc_gpio driver. This
> > register reflects the pin status if a pin is configured as gpio input.
> > If a pin is configured as an gpio output register PSR is not updated and
> > returns 0 instead of the actual pin status. Thus attempting to read back the
> > status of an gpio output pin via PSR returns a wrong value.
> >
> > Reading register DR instead of PSR fixes this issue:
> > - If pin is gpio output: DR returns the value written to DR by software
> > - If pin is gpio input: DR returns the value of register PSR und thus the
> >   pin status
> 
> Got curious because of your specific wording.  In the output
> case, does the DR value reflect what you drive to the pin, or
> what the pin's status is?  Because this need not be identical in
> the open collector case (or other "weak" scenarios like bus
> keeper, and what else HW development came up with).
> 
> If DR always reflects the pin's status, then the patch would be
> OK but the commit message would need an update.  If DR does not
> appropriately reflect the pin's status, then the patch would be
> an improvement (would fix the totem-pole case), but still would
> be wrong or incomplete in the open-collector case.


Hi Gerhard,

actually I did not take the open-collector case into account. 
I checked the iMX6q reference manual and came to this conclusion:

In the output case, reading register DR returns the value I have written 
to DR, not the actual pad state. Thus may patch only works for the 
push-pull (totem-pole) output case, not for open-drain.

However, there is a solution to read back the pin status regardless of 
its input or output configuration. Its the SION (Software Input On Bit)
in the IOMUXC MUX control register. If SION is set, the pad status can be 
read back through register PSR. Thats exactly what I intended to do. 
Bit SION can be set in the device tree (IOMUXC: CONFIG filed in the 
fsl,pins binding, bit 30).
I will verify this on my iMX6 hardware next week.

Seems there is no need for my patch at all.

Thanks for your hint.
Regards
Georg

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/