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Date: Mon, 3 Mar 2014 15:26:44 -0500
From: Don Zickus <dzickus@...hat.com>
To: Andi Kleen <andi@...stfloor.org>
Cc: Davidlohr Bueso <davidlohr@...com>, acme@...stprotocols.net,
LKML <linux-kernel@...r.kernel.org>, jolsa@...hat.com,
jmario@...hat.com, fowles@...each.com, eranian@...gle.com,
Arnaldo Carvalho de Melo <acme@...hat.com>,
David Ahern <dsahern@...il.com>,
Frederic Weisbecker <fweisbec@...il.com>,
Mike Galbraith <efault@....de>,
Paul Mackerras <paulus@...ba.org>,
Peter Zijlstra <peterz@...radead.org>,
Richard Fowles <rfowles@...hat.com>
Subject: Re: [PATCH 08/19] perf c2c: Shared data analyser
On Mon, Mar 03, 2014 at 06:23:16PM +0100, Andi Kleen wrote:
> > Hmm, so based on Andi's reply, I am assuming you are running on a Westmere
> > (or Nehalem) due to the lack of mem-stores.
> >
> > If you don't have mem-stores, this tool isn't going to work. The tool can
> > only detect contention when sampling reads _and_ writes to the same
> > addresses.
>
> On these CPUs you could simply sample on HITM. You won't get addresses,
> but at least IPs and call stacks.
Heh. I never thought about that. And sure enough a quick test with
mem-stores commented out produced the same results (minus the stores).
One would just have to 'figure' out what cacheline offsets are causing the
HITMs.
Cheers,
Don
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