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Date: Mon, 3 Mar 2014 15:32:57 -0500
From: Don Zickus <dzickus@...hat.com>
To: Andi Kleen <andi@...stfloor.org>
Cc: Peter Zijlstra <peterz@...radead.org>,
Joe Mario <jmario@...hat.com>,
Davidlohr Bueso <davidlohr@...com>, acme@...stprotocols.net,
LKML <linux-kernel@...r.kernel.org>, jolsa@...hat.com,
fowles@...each.com, eranian@...gle.com,
Arnaldo Carvalho de Melo <acme@...hat.com>,
David Ahern <dsahern@...il.com>,
Frederic Weisbecker <fweisbec@...il.com>,
Mike Galbraith <efault@....de>,
Paul Mackerras <paulus@...ba.org>,
Richard Fowles <rfowles@...hat.com>
Subject: Re: [PATCH 08/19] perf c2c: Shared data analyser
On Mon, Mar 03, 2014 at 07:58:19PM +0100, Andi Kleen wrote:
> On Mon, Mar 03, 2014 at 07:41:17PM +0100, Peter Zijlstra wrote:
> > On Mon, Mar 03, 2014 at 01:07:00PM -0500, Joe Mario wrote:
> > > If you only sample on the HITMs then you don't get the store misses.
> > > That means you'll not be able to detect who is simultaneously tugging
> > > on the same cache lines. That gives up much of the value of "perf
> > > c2c".
> >
> > As long as you know which lines are hurting bringing in (loads) you can
> > often figure out who is doing the stores on them.
>
> Yes, especially since every store is a load too (unless you're talking
> WC)
Thoughts on how to determine which load is a potential store? I agree
every store needs to load the cacheline, but I wasn't sure if there was an
approach that could be applied to determine anything useful.
Cheers,
Don
>
> The method c2c uses is more exact, but keep in mind it's a sampling
> heuristic in any cases, with some potential bias. load-latency tags
> the loads randomly and there's no guarantee that tagging is fully
> uniform. Also you only see a subset in any case.
>
> >
> > > As we developed this, we ended up settling on Ivy Bridge to get the
> > > behavior we wanted.
> >
> > Wouldn't SNB also work?
>
> Yes.
>
> Haswell is best however because it can report addresses on far more
> events.
>
> -Andi
>
> --
> ak@...ux.intel.com -- Speaking for myself only.
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