lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Tue, 1 Apr 2014 03:48:16 +0000 From: "Dongsheng.Wang@...escale.com" <Dongsheng.Wang@...escale.com> To: "guangyu.chen@...escale.com" <guangyu.chen@...escale.com> CC: "broonie@...nel.org" <broonie@...nel.org>, "alsa-devel@...a-project.org" <alsa-devel@...a-project.org>, "Li.Xiubo@...escale.com" <Li.Xiubo@...escale.com>, "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "timur@...i.org" <timur@...i.org> Subject: RE: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for Tx and Rx streams > -----Original Message----- > From: Nicolin Chen [mailto:Guangyu.Chen@...escale.com] > Sent: Tuesday, April 01, 2014 11:14 AM > To: Wang Dongsheng-B40534 > Cc: broonie@...nel.org; alsa-devel@...a-project.org; Xiubo Li-B47053; linuxppc- > dev@...ts.ozlabs.org; linux-kernel@...r.kernel.org; timur@...i.org > Subject: Re: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for > Tx and Rx streams > > On Tue, Apr 01, 2014 at 11:25:02AM +0800, Wang Dongsheng-B40534 wrote: > > > Subject: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for > Tx > > > and Rx streams > > > > > > We only enable one side interrupt for each stream since over/underrun > > > on the opposite stream would be resulted from what we previously did, > > > enabling TERE but remaining FRDE disabled, even though the xrun on the > > > opposite direction will not break the current stream. > > > > > > Signed-off-by: Nicolin Chen <Guangyu.Chen@...escale.com> > > > Acked-by: Xiubo Li <Li.Xiubo@...escale.com> > > > --- > > > sound/soc/fsl/fsl_sai.c | 8 ++++++-- > > > sound/soc/fsl/fsl_sai.h | 1 + > > > 2 files changed, 7 insertions(+), 2 deletions(-) > > > > > > diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c > > > index bdfd497..d64c33f 100644 > > > --- a/sound/soc/fsl/fsl_sai.c > > > +++ b/sound/soc/fsl/fsl_sai.c > > > @@ -397,4 +397,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream > > > *substream, int cmd, > > > > > > regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx), > > > + FSL_SAI_CSR_xIE_MASK, FSL_SAI_FLAGS); > > > + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx), > > > FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE); > > > break; > > > @@ -404,4 +406,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream > > > *substream, int cmd, > > > regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx), > > > FSL_SAI_CSR_FRDE, 0); > > > + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx), > > > + FSL_SAI_CSR_xIE_MASK, 0); > > > > > > if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) { > > > @@ -464,6 +468,6 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai) > > > struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev); > > > > > > - regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, FSL_SAI_FLAGS); > > > - regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, FSL_SAI_FLAGS); > > > + regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, 0x0); > > > + regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, 0x0); > > > > Why are you remove this macro? Don't use magic number. > > It's pretty clear that the so-called magic number is to clear the settings > in the registers for driver init as what this driver did at the first place > -- no offense but I don't think you would ask this if you check the git-log > of the driver. > ~FSL_SAI_MASK is better than 0x0. And you also replace 0xffffffff. Regards, -Dongsheng > Thank you, > Nicolin Chen -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists