linux-kernel - Re: [PATCH 3/3] edac: altera: Add SDRAM EDAC support for CycloneV/ArriaV

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Date:	Tue, 8 Apr 2014 12:08:51 +0200
From:	Borislav Petkov <bp@...en8.de>
To:	tthayer@...era.com
Cc:	robherring2@...il.com, dougthompson@...ssion.com,
	grant.likely@...aro.org, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	rob@...dley.net, linux@....linux.org.uk, dinguyen@...era.com,
	devicetree@...r.kernel.org, linux-edac@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] edac: altera: Add SDRAM EDAC support for
 CycloneV/ArriaV

On Mon, Apr 07, 2014 at 04:54:09PM -0500, tthayer@...era.com wrote:
> From: Thor Thayer <tthayer@...era.com>
> 
> Added EDAC support for reporting ECC errors of CycloneV
> and ArriaV SDRAM controller.
> - The SDRAM Controller registers are used by the FPGA bridge so
>   these are accessed through the syscon interface.
> - The configuration of the SDRAM memory size for the EDAC framework
>   is discovered from the memory node of the device tree.
> - Documentation of the bindings in devicetree/bindings/arm/altera/
>   socfpga-sdram-edac.txt
> - Correction of single bit errors, detection of double bit errors.

Before I go and take a look at this further, is anyone at Altera going
to maintain this driver in case of bug reports and issues with it?

Also, I see patch 3/3. Are the other two related? I see they are
devicetree additions and, as such, all three should go together...

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
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