linux-kernel - [PATCH] Add support for flag status register on Micron chips

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Date:	Tue, 8 Apr 2014 11:12:49 -0500
From:	<grmoore@...era.com>
To:	<ggrahammoore@...il.com>
CC:	David Woodhouse <dwmw2@...radead.org>,
	Brian Norris <computersforpeace@...il.com>,
	Marek Vasut <marex@...x.de>,
	Artem Bityutskiy <artem.bityutskiy@...ux.intel.com>,
	Sourav Poddar <sourav.poddar@...com>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Geert Uytterhoeven <geert+renesas@...ux-m68k.org>,
	Jingoo Han <jg1.han@...sung.com>,
	Insop Song <insop.song@...nspeed.com>,
	Graham Moore <grmoore@...era.com>,
	<linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
	Alan Tull <atull@...era.com>,
	Dinh Nguyen <dinguyen@...era.com>,
	Yves Vandervennet <rocket.yvanderv@...il.com>
Subject: [PATCH] Add support for flag status register on Micron chips   

From: Graham Moore <grmoore@...era.com>

This is a slightly different version of the patch that Insop Song
submitted (http://marc.info/?i=201403012022.10111.marex%20()%20denx%20!%20de).

I talked to Insop, and he agreed I should submit this patch as a follow-on to his.

This patch uses a flag in the m25p_ids[] array to determine which chips need
to use the FSR (Flag Status Register).

Rationale for using the FSR:

The Micron data sheets say we have to do this, at least for the multi-die 512M 
and 1G parts (n25q512 and n25q00).  In practice, if we don't check the FSR 
for program/erase status, and we rely solely on the status register (SR), 
then we get corrupted data in the flash.

Micron told us (Altera) that for multi-die chips based on the 65nm 256MB
die, we need to check the SR first, then check the FSR, which is why the 
wait_for_fsr_ready function does that.  Future chips based on 45 nm 512MB die 
will use the FSR only.              

Thanks.

Graham Moore (1):
  Add support for flag status register on Micron chips.

 drivers/mtd/devices/m25p80.c |   94 +++++++++++++++++++++++++++++++++++-------
 1 file changed, 80 insertions(+), 14 deletions(-)

-- 
1.7.10.4

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