linux-kernel - Re: [PATCH v2] x86: hpet: Don't default CONFIG_HPET_TIMER to be y for X86

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Date:	Tue, 15 Apr 2014 17:55:39 +0800
From:	Feng Tang <feng.tang@...el.com>
To:	Ingo Molnar <mingo@...nel.org>
Cc:	Clemens Ladisch <clemens@...isch.de>, tglx@...utronix.de,
	mingo@...e.hu, hpa@...or.com, linux-kernel@...r.kernel.org,
	John Stultz <john.stultz@...aro.org>,
	Andy Lutomirski <luto@...capital.net>
Subject: Re: [PATCH v2] x86: hpet: Don't default CONFIG_HPET_TIMER to be y
 for X86_64

On Tue, Apr 15, 2014 at 11:00:25AM +0200, Ingo Molnar wrote:
> 
> * Feng Tang <feng.tang@...el.com> wrote:
> 
> > Hi Ingo,
> > 
> > On Fri, Mar 28, 2014 at 09:11:17AM +0100, Ingo Molnar wrote:
> > > 
> > > * Clemens Ladisch <clemens@...isch.de> wrote:
> > > 
> > > > Feng Tang wrote:
> > > > > On Fri, Mar 28, 2014 at 08:17:16AM +0100, Ingo Molnar wrote:
> > > > >> * Feng Tang <feng.tang@...el.com> wrote:
> > > > >>  - or the kernel should have a quirk to reliably disable it. Why
> > > > >>    should we crash or misbehave if a driver is built into the
> > > > >>    kernel?
> > > > >
> > > > > I thought about this before, HPET doesn't have PCI ID like stuff,
> > > > 
> > > > HPET does have the PCI vendor ID in the first register.
> > > > 
> > > > > only thing I can think of to identify them may be the CPU family/ID.
> > > > 
> > > > The HPET is implemented by some actual chip, and that chip also has lots
> > > > of PCI devices.  (In the case of a SoC, the CPU ID would work, too).
> > > 
> > > Correct. See arch/x86/kernel/hpet.c, which has a large number of HPET 
> > > quirks keyed off chipset PCI IDs:
> > > 
> > >   DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_0,
> > >                            ich_force_enable_hpet);
> > >   DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0,
> > >                            ich_force_enable_hpet);
> > >   DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1,
> > >                            ich_force_enable_hpet);
> > >   [...]
> > 
> > I just gave it another thought, that the HPET on our platform 
> > currently do have some problem to be used as clocksource/clockevent, 
> > but it may get fixed in future version (by Silicon or BIOS).
> > 
> > If I add quirk to block it now, I may revert this code in future 
> > when it get fixed, same problem applis for the future generation of 
> > platform.
> 
> If the hardware or BIOS gets fixed then that will be visible in the 
> revision level of the hardware, right?

AFAIK, if it is fixed in a new silicon version, we should be able to
detect it by the "stepping", but the PCI DEV ID is not likely to change. 

If it is fixed by BIOS or PUNIT FW, then we may go through the DMI
info to check the BIOS version, One problem is there is some Baytrail
tablet platforms that doesn't provide DMI info as its FW is not
UEFI/Legacy BIOS compatible version.

Thanks,
Feng

> 
> Such kind of revision level, once it is known, can then be used to 
> turn the quirk on/off precisely.
> 
> Thanks,
> 
> 	Ingo
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