linux-kernel - [PATCH 0/5] fixing regressions caused by Dove in MULTI

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Date:	Tue, 15 Apr 2014 20:15:58 +0200
From:	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
To:	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Cc:	Russell King <linux@....linux.org.uk>,
	Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
	Kevin Hilman <khilman@...aro.org>,
	Andrew Lunn <andrew@...n.ch>,
	Jason Cooper <jason@...edaemon.net>,
	Gregory Clement <gregory.clement@...e-electrons.com>,
	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
	Eric Miao <eric.y.miao@...il.com>,
	Haojian Zhuang <haojian.zhuang@...il.com>,
	Chao Xie <xiechao.mail@...il.com>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH 0/5] fixing regressions caused by Dove in MULTI_V7

This is a patch set fixing regressions in v3.15-rc1 ultimately caused
by adding DT-enabled Marvell Dove to MULTI_V7. There was a fix
introduced late in the merge window to fix a related regression for
non-PJ4 architectures, that turned out to introduce another regression
on PJ4B-based Armada 370/XP.

Therefore, this now takes care of iWMMXt and PJ4[B] related code to
properly fix all regressions observed in v3.15-rc1. At the end, one
patch adding support for iWMMXt on PJ4B as found on Marvell Berlin
BG2 SoCs is added.

Patch 1 reworks iwmmxt.S preprocessor directives to allow to build
it only if a supported platform is enabled. Also, it rewrites them
to explicitly check for all CPUs of the currently supported
architectures.

Patch 2 fixes pj4_cp0_init to only enable iWMMXt capabilities, if
corresponding kernel support code is also enabled by CONFIG_IWMMXT.

Patch 3 fixes pj4_cp0_init to properly perform runtime checks for
absence/presence of iWMMXt coprocessor. This effectively fixes
boot regressions observed on Armada 370/XP.

Patch 4 fixes cpu_is_pj4's cpuid check to check for both PJ4 and
PJ4B. This effectively fixes iWMMXt support on MULTI_V7 Dove.

Patch 5 finally allows PJ4B to also enable iWMMXt support as there
are some PJ4B based SoCs, e.g. Marvell Armada 1500, that have those
coprocessors. This is _not_ a fix but an improvement and should be
treated as such, i.e. taken for v3.16.

As a side note, after looking into this: if XScale based SoCs also
properly perform runtime checks for iWMMXt presence, I'd be
interested on comments if iWMMXt can possibly also be reworked to
be build as a module dynamically adding/removing iWMMXt support?

I expect proper Tested-by's for Armada 370/XP, where some
preliminary patches have been boot tested by Thomas Petazzoni.
I boot tested it on Marvell Dove and Marvell Berlin BG2.
Any Tested-by's from XScale and/or non-PJ4[B] architectures are
also appreciated.

Russell, please let me know if/when you are happy with the fixes
and the improvement. I'll be adding them to your patch tracker then.

Sebastian

Sebastian Hesselbarth (5):
  ARM: iwmmxt: explicitly check for supported architectures
  ARM: pj4: enable iWMMXt only if CONFIG_IWMMXT is set
  ARM: pj4: properly detect existence of iWMMXt coprocessor
  ARM: pj4: fix cpu_is_pj4 check
  ARM: iwmmxt: allow to build iWMMXt on Marvell PJ4B

 arch/arm/Kconfig               |  6 +++---
 arch/arm/include/asm/cputype.h | 14 +++++++-------
 arch/arm/kernel/Makefile       |  1 +
 arch/arm/kernel/iwmmxt.S       |  8 ++++++--
 arch/arm/kernel/pj4-cp0.c      | 42 +++++++++++++++++++++++++++++++++++++++---
 5 files changed, 56 insertions(+), 15 deletions(-)

---
Cc: Russell King <linux@....linux.org.uk>
Cc: Arnd Bergmann <arnd@...db.de>
Cc: Olof Johansson <olof@...om.net>
Cc: Kevin Hilman <khilman@...aro.org>
Cc: Andrew Lunn <andrew@...n.ch>
Cc: Jason Cooper <jason@...edaemon.net>
Cc: Gregory Clement <gregory.clement@...e-electrons.com>
Cc: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
Cc: Eric Miao <eric.y.miao@...il.com>
Cc: Haojian Zhuang <haojian.zhuang@...il.com>
Cc: Chao Xie <xiechao.mail@...il.com>
Cc: linux-arm-kernel@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org
-- 
1.9.1

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