linux-kernel - Re: [PATCH V3] Add support for flag status register on Micron chips.

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Date:	Tue, 22 Apr 2014 18:55:57 +0200
From:	Marek Vasut <marex@...x.de>
To:	Graham Moore <grmoore@...era.com>
Cc:	ggrahammoore@...il.com, David Woodhouse <dwmw2@...radead.org>,
	Brian Norris <computersforpeace@...il.com>,
	Artem Bityutskiy <artem.bityutskiy@...ux.intel.com>,
	Sourav Poddar <sourav.poddar@...com>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Geert Uytterhoeven <geert+renesas@...ux-m68k.org>,
	Jingoo Han <jg1.han@...sung.com>,
	Insop Song <insop.song@...nspeed.com>,
	linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Alan Tull <atull@...era.com>,
	Dinh Nguyen <dinguyen@...era.com>,
	Yves Vandervennet <rocket.yvanderv@...il.com>
Subject: Re: [PATCH V3] Add support for flag status register on Micron chips.

On Tuesday, April 22, 2014 at 04:03:16 PM, Graham Moore wrote:
[...]

>  #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\
> @@ -488,6 +534,8 @@ const struct spi_device_id spi_nor_ids[] = {
>  	{ "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024,  256, 0) },
>  	{ "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K) },
>  	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K) },
> +	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, USE_FSR) },
> +	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, USE_FSR) },

Are you sure the n25q512a doesn't use FSR ? Do n25q512a{1,8}3 share the same 
IDs?

[...]
Best regards,
Marek Vasut
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