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Date:	Fri, 9 May 2014 09:57:30 +0200
From:	Borislav Petkov <bp@...en8.de>
To:	Andres Freund <andres@...razel.de>
Cc:	Borislav Petkov <bp@...e.de>, x86@...nel.org,
	linux-kernel@...r.kernel.org,
	"H. Peter Anvin" <hpa@...ux.intel.com>,
	Ingo Molnar <mingo@...hat.com>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH 2/2] x86: Fix typo in MSR_IA32_MISC_ENABLE_LIMIT_CPUID
 macro

On Fri, May 09, 2014 at 03:29:17AM +0200, Andres Freund wrote:
> The spuriously added semicolon didn't have any effect because the
> macro isn't currently in use.
> 
> c0a639ad0bc6b178b46996bd1f821a04643e2bde
> 
> Signed-off-by: Andres Freund <andres@...razel.de>
> Cc: Borislav Petkov <bp@...e.de>
> Cc: H. Peter Anvin <hpa@...ux.intel.com>
> Cc: Ingo Molnar <mingo@...hat.com>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> ---
>  arch/x86/include/uapi/asm/msr-index.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
> index c827ace..fcf2b3a 100644
> --- a/arch/x86/include/uapi/asm/msr-index.h
> +++ b/arch/x86/include/uapi/asm/msr-index.h
> @@ -384,7 +384,7 @@
>  #define MSR_IA32_MISC_ENABLE_MWAIT_BIT			18
>  #define MSR_IA32_MISC_ENABLE_MWAIT			(1ULL << MSR_IA32_MISC_ENABLE_MWAIT_BIT)
>  #define MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT		22
> -#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID		(1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT);
> +#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID		(1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT)
>  #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT		23
>  #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE		(1ULL << MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT)
>  #define MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT		34

Acked-by: Borislav Petkov <bp@...e.de>

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
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