linux-kernel - Re: [PATCH v2 06/14] mmc: mmci: Qcomm: Add 3 clock cycle delay after register write

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Date:	Fri, 23 May 2014 11:03:38 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc:	Russell King <linux@....linux.org.uk>,
	Ulf Hansson <ulf.hansson@...aro.org>,
	"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
	Chris Ball <chris@...ntf.net>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>
Subject: Re: [PATCH v2 06/14] mmc: mmci: Qcomm: Add 3 clock cycle delay after
 register write

On Thu, May 15, 2014 at 11:37 AM,  <srinivas.kandagatla@...aro.org> wrote:

> From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
>
> Most of the Qcomm SD card controller registers must be updated to the MCLK
> domain so subsequent writes to registers will be ignored until 3 clock cycles
> have passed.
>
> This patch adds a 3 clock cycle delay required after writing to controller
> registers on Qualcomm SOCs. Without this delay all the register writes are not
> successful, resulting in not detecting cards. The write clock delay is
> activated by setting up mclk_delayed_writes variable in variant data.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>

OK this is looking good.
Reviewed-by: Linus Walleij <linus.walleij@...aro.org>

Yours,
Linus Walleij
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