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Date:	Mon, 26 May 2014 12:47:30 +0800
From:	Chen-Yu Tsai <wens@...e.org>
To:	Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc:	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Samuel Ortiz <sameo@...ux.intel.com>,
	Lee Jones <lee.jones@...aro.org>,
	Rob Herring <robh+dt@...nel.org>,
	Mike Turquette <mturquette@...aro.org>,
	Emilio Lopez <emilio@...pez.com.ar>,
	Linus Walleij <linus.walleij@...aro.org>,
	linux-serial@...r.kernel.org,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	devicetree <devicetree@...r.kernel.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	Hans de Goede <hdegoede@...hat.com>,
	Boris BREZILLON <boris.brezillon@...e-electrons.com>,
	Luc Verhaegen <libv@...net.be>
Subject: Re: [PATCH 03/22] clk: sunxi: add "pll6" to sun6i protected clock list

On Mon, May 26, 2014 at 2:48 AM, Maxime Ripard
<maxime.ripard@...e-electrons.com> wrote:
> On Fri, May 23, 2014 at 03:51:06PM +0800, Chen-Yu Tsai wrote:
>> PLL6 is used by some important but undocumented module, most likely
>> memory related, such as mbus or the actual memory controller. As we
>> do not have a driver for that, add pll6 to the list of protected
>> clocks, so that it won't be disabled and leave us with a non-responsive
>> system.
>
> What issue have you seen?

Completely unresponsive after PLL6 is gated (on the A23).

> The system actually works pretty great on the A31.

Does it work when there aren't any other PLL6 consumers?
Maybe the boot0 on A31 and A23 setup some DRAM-related modules differently.

If the A31 works without protecting PLL6, I'll add a separate list
for the A23.


Thanks,
ChenYu
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