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Date:	Wed, 28 May 2014 13:14:04 -0400
From:	Murali Karicheri <m-karicheri2@...com>
To:	Jason Gunthorpe <jgunthorpe@...idianresearch.com>
CC:	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Russell King <linux@....linux.org.uk>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH] ARM: pci: add call to pcie_bus_configure_settings()

On 5/28/2014 12:58 PM, Jason Gunthorpe wrote:
> On Wed, May 28, 2014 at 10:26:16AM -0400, Murali Karicheri wrote:
>> PCI core supports PCIE_BUS_SAFE and PCIE_BUS_PERFORMANCE modes.
>> PCI controllers may not be able to handle pay load size higher
>> than MPS and also read data size higher than MRSS. So limit the
>> max to the least common supported payload size by calling
>> pcie_bus_configure_settings(). Using pci=pcie_bus_safe do a walk
>> and set the MPS to least common value used by devices on the bus.
>> pci=pcie_bus_perf does do a walk and set MRSS to MPS.
> This text doesn't make much sense.. Calling
> pcie_bus_configure_settings is just a good thing to do, the fact it
> helps avoid a HW defect in a specific PCI-E implementation is not the
> main reason to add this to the core ARM code.
>
>   Call pcie_bus_configure_settings on ARM, like for other
>   platforms. pcie_bus_configure_settings makes sure the MPS across the
>   bus is uniform and provides the ability to tune the MRSS and MPS to
>   higher performance values.
>
>   This is particularly important for embedded where there is no
>   firmware to program these PCI-E settings for the OS.

Thanks. I will add this text for v1.
>
>> +
>> +			list_for_each_entry(child, &bus->children, node)
>> +			pcie_bus_configure_settings(child);
>                    ^^^^^^^^^^^^^^^
>
> Missing indent.
>
> Regards,
> Jason
Will fix in v1.

Thanks
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