linux-kernel - [tip:perf/core] perf/x86: Add conditional branch filtering support

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Date:	Thu, 5 Jun 2014 07:39:49 -0700
From:	tip-bot for Anshuman Khandual <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, eranian@...gle.com, hpa@...or.com,
	mingo@...nel.org, torvalds@...ux-foundation.org,
	peterz@...radead.org, khandual@...ux.vnet.ibm.com, acme@...nel.org,
	ak@...ux.intel.com, tglx@...utronix.de
Subject: [tip:perf/core] perf/x86:
  Add conditional branch filtering support

Commit-ID:  37548914fbfcd56e1955a9b7e55dc3b84a3e9e25
Gitweb:     http://git.kernel.org/tip/37548914fbfcd56e1955a9b7e55dc3b84a3e9e25
Author:     Anshuman Khandual <khandual@...ux.vnet.ibm.com>
AuthorDate: Thu, 22 May 2014 12:50:09 +0530
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Thu, 5 Jun 2014 12:30:23 +0200

perf/x86: Add conditional branch filtering support

This patch adds conditional branch filtering support,
enabling it for PERF_SAMPLE_BRANCH_COND in perf branch
stack sampling framework by utilizing an available
software filter X86_BR_JCC.

Signed-off-by: Anshuman Khandual <khandual@...ux.vnet.ibm.com>
Reviewed-by: Stephane Eranian <eranian@...gle.com>
Reviewed-by: Andi Kleen <ak@...ux.intel.com>
Signed-off-by: Peter Zijlstra <peterz@...radead.org>
Cc: mpe@...erman.id.au
Cc: benh@...nel.crashing.org
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Link: http://lkml.kernel.org/r/1400743210-32289-3-git-send-email-khandual@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/kernel/cpu/perf_event_intel_lbr.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index d82d155..9dd2459 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -384,6 +384,9 @@ static void intel_pmu_setup_sw_lbr_filter(struct perf_event *event)
 	if (br_type & PERF_SAMPLE_BRANCH_NO_TX)
 		mask |= X86_BR_NO_TX;
 
+	if (br_type & PERF_SAMPLE_BRANCH_COND)
+		mask |= X86_BR_JCC;
+
 	/*
 	 * stash actual user request into reg, it may
 	 * be used by fixup code for some CPU
@@ -678,6 +681,7 @@ static const int nhm_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX] = {
 	 * NHM/WSM erratum: must include IND_JMP to capture IND_CALL
 	 */
 	[PERF_SAMPLE_BRANCH_IND_CALL] = LBR_IND_CALL | LBR_IND_JMP,
+	[PERF_SAMPLE_BRANCH_COND]     = LBR_JCC,
 };
 
 static const int snb_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX] = {
@@ -689,6 +693,7 @@ static const int snb_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX] = {
 	[PERF_SAMPLE_BRANCH_ANY_CALL]	= LBR_REL_CALL | LBR_IND_CALL
 					| LBR_FAR,
 	[PERF_SAMPLE_BRANCH_IND_CALL]	= LBR_IND_CALL,
+	[PERF_SAMPLE_BRANCH_COND]       = LBR_JCC,
 };
 
 /* core */
--
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