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Date: Wed, 25 Jun 2014 17:19:12 -0700 From: Stephen Boyd <sboyd@...eaurora.org> To: Sudeep Holla <sudeep.holla@....com> CC: linux-kernel@...r.kernel.org, Heiko Carstens <heiko.carstens@...ibm.com>, Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>, Russell King <linux@....linux.org.uk>, Will Deacon <will.deacon@....com>, Nicolas Pitre <nicolas.pitre@...aro.org>, linux-arm-kernel@...ts.infradead.org Subject: Re: [PATCH 8/9] ARM: kernel: add support for cpu cache information On 06/25/14 10:30, Sudeep Holla wrote: > + > +/* > + * Which cache CCSIDR represents depends on CSSELR value > + * Make sure no one else changes CSSELR during this > + * smp_call_function_single prevents preemption for us > + */ Where's the smp_call_function_single() or preemption disable happening? > +static inline u32 get_ccsidr(u32 csselr) > +{ > + u32 ccsidr; > + > + /* Put value into CSSELR */ > + asm volatile ("mcr p15, 2, %0, c0, c0, 0" : : "r" (csselr)); > + isb(); > + /* Read result out of CCSIDR */ > + asm volatile ("mrc p15, 1, %0, c0, c0, 0" : "=r" (ccsidr)); > + > + return ccsidr; > +} > + -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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