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Date: Mon, 7 Jul 2014 16:59:19 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Maxime COQUELIN <maxime.coquelin@...com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@...aro.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
stable <stable@...r.kernel.org>, kernel@...inux.com,
Patrice CHOTARD <patrice.chotard@...com>
Subject: Re: [PATCH] pinctrl: st: Fix irqmux handler
On Fri, Jun 20, 2014 at 1:34 PM, Maxime COQUELIN <maxime.coquelin@...com> wrote:
> st_gpio_irqmux_handler() reads the status register to find out
> which banks inside the controller have pending IRQs.
> For each banks having pending IRQs, it calls the corresponding handler.
>
> Problem is that current code restricts the number of possible banks inside the
> controller to ST_GPIO_PINS_PER_BANK. This define represents the number of pins
> inside a bank, so it shouldn't be used here.
>
> On STiH407, PIO_FRONT0 controller has 10 banks, so IRQs pending in the two
> last banks (PIO18 & PIO19) aren't handled.
>
> This patch replace ST_GPIO_PINS_PER_BANK by the number of banks inside the
> controller.
>
> Cc: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
> Cc: Linus Walleij <linus.walleij@...aro.org>
> Cc: <stable@...r.kernel.org> #v3.15+
> Signed-off-by: Maxime Coquelin <maxime.coquelin@...com>
Patch applied for fixes with Srinivas ACK.
Thanks!
Yours,
Linus Walleij
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