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Date: Mon, 7 Jul 2014 20:32:36 +0200
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@...osoft.com>
To: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Cc: Nicolas Ferre <nicolas.ferre@...el.com>,
Boris Brezillon <boris.brezillon@...e-electrons.com>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 3/5] ARM: at91/dt: sama5d3: define mpddr clock and ramc
clocks
On 17:19 Mon 07 Jul , Alexandre Belloni wrote:
>
> Define the available clock for mprddr and take both mpddr_clk and ddrck in the
> ram controller driver.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
> ---
> arch/arm/boot/dts/sama5d3.dtsi | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
> index e0b15a6e8897..3bd8db9e069b 100644
> --- a/arch/arm/boot/dts/sama5d3.dtsi
> +++ b/arch/arm/boot/dts/sama5d3.dtsi
> @@ -402,8 +402,10 @@
> };
>
> ramc0: ramc@...fea00 {
> - compatible = "atmel,at91sam9g45-ddramc";
> + compatible = "atmel,sama5d3-mpddramc", "atmel,at91sam9g45-ddramc";
the sama5 ddr controler is not back compitble with 9g45 one the compatible is
wrong
> reg = <0xffffea00 0x200>;
> + clocks = <&ddrck>, <&mpddr_clk>;
> + clock-names = "ddrck", "mpddr";
> };
>
> dbgu: serial@...fee00 {
> @@ -1170,6 +1172,11 @@
> #clock-cells = <0>;
> reg = <48>;
> };
> +
> + mpddr_clk: mpddr_clk {
> + #clock-cells = <0>;
> + reg = <49>;
> + };
> };
> };
>
> --
> 1.9.1
>
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