linux-kernel - Re: [PATCH 12/13] cpufreq: Add cpufreq driver for Tegra124

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Date:	Fri, 11 Jul 2014 09:33:47 -0700
From:	Andrew Bresticker <abrestic@...omium.org>
To:	Tuomas Tynkkynen <ttynkkynen@...dia.com>
Cc:	Thierry Reding <thierry.reding@...il.com>,
	Peter De Schrijver <pdeschrijver@...dia.com>,
	Viresh Kumar <viresh.kumar@...aro.org>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
	Stephen Warren <swarren@...dotorg.org>,
	Prashant Gaikwad <pgaikwad@...dia.com>,
	Mike Turquette <mturquette@...aro.org>,
	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH 12/13] cpufreq: Add cpufreq driver for Tegra124

On Fri, Jul 11, 2014 at 8:29 AM, Tuomas Tynkkynen <ttynkkynen@...dia.com> wrote:
>
> On the hardware level, the two I2C controllers sharing the same pins
> have knowledge of each other and won't start transmitting if the bus
> is busy (something different from the usual I2C arbitration, that is).
> I guess on the kernel side there could be a problem if the voltage register
> is marked cached in the PMIC driver's regmap.

Yeah, in our tree we have a hack to disable regcache for SD0_VOLTAGE.
Other than the value reported to userspace being wrong, leaving it as
cacheable shouldn't be an issue if no other drivers try to read/write
that register.
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