linux-kernel - Re: [PATCH] irqchip: gic: Fix core ID calculation when topology is read from DT

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Thu, 17 Jul 2014 17:40:50 +0200
From:	Tomasz Figa <t.figa@...sung.com>
To:	Jason Cooper <jason@...edaemon.net>
Cc:	linux-samsung-soc@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Kukjin Kim <kgene.kim@...sung.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Tomasz Figa <tomasz.figa@...il.com>,
	Marek Szyprowski <m.szyprowski@...sung.com>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Subject: Re: [PATCH] irqchip: gic: Fix core ID calculation when topology is
 read from DT

Hi Jason,

On 17.07.2014 17:32, Jason Cooper wrote:
> On Thu, Jul 17, 2014 at 05:23:44PM +0200, Tomasz Figa wrote:
>> Certain GIC implementation, namely those found on earlier, single
>> cluster, Exynos SoCs, have registers mapped without per-CPU banking,
>> which means that the driver needs to use different offset for each CPU.
>>
>> Currently the driver calculates the offset by multiplying value returned
>> by cpu_logical_map() by CPU offset parsed from DT. This is correct when
>> CPU topology is not specified in DT and aforementioned function returns
>> core ID alone. However when DT contains CPU topology, the function
>> changes to return cluster ID as well, which is non-zero on mentioned
>> SoCs and so breaks the calculation in GIC driver.
>>
>> This patch fixes this by masking out cluster ID in CPU offset
>> calculation so that only core ID is considered. Multi-cluster Exynos
>> SoCs already have banked GIC implementations, so this simple fix should
>> be enough.
>>
>> Reported-by: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
>> Reported-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>
>> Signed-off-by: Tomasz Figa <t.figa@...sung.com>
>> ---
>>  drivers/irqchip/irq-gic.c | 5 ++++-
>>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> iiuc, this was introduced by:
> 
>   db0d4db22a78d ARM: gic: allow GIC to support non-banked setups
> 
> and so should be for v3.3 and up, correct?

Could be, although there was and still is no topology data specified in
DT for affected Exynos SoCs. The need for it showed up just recently, so
I'm not sure this is a regression to fix in older kernels.

Best regards,
Tomasz
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/