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Date:	Wed, 20 Aug 2014 09:32:49 -0500
From:	atull <atull@...nsource.altera.com>
To:	Romain Baeriswyl <Romain.Baeriswyl@...lis.com>
CC:	Wolfram Sang <wsa@...-dreams.de>,
	Mika Westerberg <mika.westerberg@...ux.intel.com>,
	Christian Ruppert <christian.ruppert@...lis.com>,
	"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
	<linux-i2c@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	Mark Rutland <mark.rutland@....com>, <baruch@...s.co.il>,
	<grant.likely@...aro.org>, <robh+dt@...nel.org>,
	<skuribay@...ox.com>, <alan@...ux.intel.com>,
	<devicetree@...r.kernel.org>, <delicious.quinoa@...il.com>,
	<dinguyen@...nsource.altera.com>, <yvanderv@...nsource.altera.com>,
	Romain Baeriswyl <romainba@...lis.com>
Subject: Re: [PATCH] i2c designware add support of I2C standard mode



On Wed, 20 Aug 2014, Romain Baeriswyl wrote:

> From: Romain Baeriswyl <Romain.Baeriswyl@...lis.com>
> 
> Some legacy devices support ony I2C standard mode at 100kHz.
> This patch allows to select the standard mode through the DTS
> with the use of the existing clock-frequency parameter.
> 
> When clock-frequency parameter is not set, the fast mode is selected.
> Only when the parameter is set at 100000, the standard mode is selected.
> 
> Signed-off-by: Romain Baeriswyl <romainba@...lis.com>
> Reviewed-by: Christian Ruppert <christian.ruppert@...lis.com>
> ---
>  drivers/i2c/busses/i2c-designware-platdrv.c |   23 +++++++++++++++++++++--
>  1 files changed, 21 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
> index 402ec39..b543fe1 100644
> --- a/drivers/i2c/busses/i2c-designware-platdrv.c
> +++ b/drivers/i2c/busses/i2c-designware-platdrv.c
> @@ -122,6 +122,7 @@ static int dw_i2c_probe(struct platform_device *pdev)
>  	struct i2c_adapter *adap;
>  	struct resource *mem;
>  	int irq, r;
> +	u32 clk_freq;
>  
>  	irq = platform_get_irq(pdev, 0);
>  	if (irq < 0) {
> @@ -151,6 +152,9 @@ static int dw_i2c_probe(struct platform_device *pdev)
>  		return PTR_ERR(dev->clk);
>  	clk_prepare_enable(dev->clk);
>  
> +	/* fast mode by default because of legacy reasons */
> +	clk_freq = 400000;
> +
>  	if (pdev->dev.of_node) {
>  		u32 ht = 0;
>  		u32 ic_clk = dev->get_clk_rate_khz(dev);
> @@ -166,6 +170,17 @@ static int dw_i2c_probe(struct platform_device *pdev)
>  		of_property_read_u32(pdev->dev.of_node,
>  				     "i2c-scl-falling-time-ns",
>  				     &dev->scl_falling_time);
> +
> +		of_property_read_u32(pdev->dev.of_node, "clock-frequency",
> +				     &clk_freq);
> +
> +		/* Only standard mode at 100kHz and fast mode at 400kHz
> +		 * are supported.
> +		 */
> +		if (clk_freq != 100000 && clk_freq != 400000) {
> +			dev_err(&pdev->dev, "Only 100kHz and 400kHz supported");
> +			return -EINVAL;
> +		}

Hi Romain,

It is common to operate i2c at <100KHz on boards that have i2c 
issues.  I am using this driver at 50KHz because I have a LCD module 
that just doesn't work at a full 100KHz.  Please remove the check for 
these two frequency points.

>  	}
>  
>  	dev->functionality =
> @@ -175,8 +190,12 @@ static int dw_i2c_probe(struct platform_device *pdev)
>  		I2C_FUNC_SMBUS_BYTE_DATA |
>  		I2C_FUNC_SMBUS_WORD_DATA |
>  		I2C_FUNC_SMBUS_I2C_BLOCK;
> -	dev->master_cfg =  DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
> -		DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST;
> +	if (clk_freq == 100000)

Please change to <=

> +		dev->master_cfg =  DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
> +			DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_STD;
> +	else
> +		dev->master_cfg =  DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
> +			DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST;
>  
>  	/* Try first if we can configure the device from ACPI */
>  	r = dw_i2c_acpi_configure(pdev);
> -- 
> 1.7.1
> 
> 
--
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