linux-kernel - Re: [PATCH v2] tps65910: Work around silicon erratum SWCZ010

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Tue, 26 Aug 2014 18:21:18 +0200
From:	Arnout Vandecappelle <arnout@...d.be>
To:	Laxman Dewangan <ldewangan@...dia.com>,
	Samuel Ortiz <sameo@...ux.intel.com>,
	Lee Jones <lee.jones@...aro.org>,
	Mark Brown <broonie@...nel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC:	David Brown <davidb@...eaurora.org>
Subject: Re: [PATCH v2] tps65910: Work around silicon erratum SWCZ010

On 08/26/14 12:14, Laxman Dewangan wrote:
> Because this patch is dropped from Mark's tree, here is opportunity to revisit
> patch.
> 
> On Friday 22 August 2014 09:00 PM, Arnout Vandecappelle (Essensium/Mind) wrote:
>>  From http://www.ti.com/lit/pdf/SWCZ010 :
>>
>>
>> Workaround:
>> Repeat I2C access.
> 
>> A simpler workaround is to make a dummy transfer just before the first
>> access to the tps65910 chip. This can be done unconditionally.
>> >id = chip_id;
>>   +    /* Work around silicon erratum SWCZ010: the tps65910 may miss the
>> +     * first I2C transfer. So issue a dummy transfer before the first
>> +     * real transfer.
>> +     */
>> +    i2c_master_send(i2c, "", 1);
> 
> I think dummy read is more safe operation than dummy write.
> Dummy write can create the write on any register which can damage the critical
> settings or it may be possible that it will be incomplete calls. Datasheet has
> not been explained this clearly.

 We're just sending the register address 0 of the SMBus transfer, without an
actual read/write request. If we do an i2c_master_recv, it's not a valid SMBus
transfer so we're equally unsure about how the chip will react to that.

 But if you like, I can check how the chip reacts to it - most likely it'll just
ignore it, possibly it won't even ack it.


 Regards,
 Arnout
-- 
Arnout Vandecappelle                          arnout at mind be
Senior Embedded Software Architect            +32-16-286500
Essensium/Mind                                http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium           BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint:  7CB5 E4CC 6C2E EFD4 6E3D A754 F963 ECAB 2450 2F1F
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/