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Date: Mon, 1 Sep 2014 03:20:00 +0000 From: "Chen, Alvin" <alvin.chen@...el.com> To: atull <atull@...nsource.altera.com> CC: Linus Walleij <linus.walleij@...aro.org>, Alexandre Courbot <gnurou@...il.com>, Grant Likely <grant.likely@...aro.org>, Rob Herring <robh+dt@...nel.org>, "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, "Ong, Boon Leong" <boon.leong.ong@...el.com>, "Shevchenko, Andriy" <andriy.shevchenko@...el.com>, "Westerberg, Mika" <mika.westerberg@...el.com>, "Kweh, Hock Leong" <hock.leong.kweh@...el.com>, Darren Hart <dvhart@...ux.intel.com> Subject: RE: [PATCH 3/3] GPIO: gpio-dwapb: Suspend & Resume PM enabling > > +/* Store GPIO context across system-wide suspend/resume transitions > > +*/ static struct gpio_saved_regs { > > + unsigned long data; > > + unsigned long dir; > > + unsigned long int_en; > > + unsigned long int_mask; > > + unsigned long int_type; > > + unsigned long int_pol; > > + unsigned long int_deb; > > +} saved_regs; > > + > > +static int dwapb_gpio_suspend(struct device *dev) { > > + struct platform_device *pdev = to_platform_device(dev); > > + struct dwapb_gpio *gpio = platform_get_drvdata(pdev); > > + struct bgpio_chip *bgc = &gpio->ports[0].bgc; > > + unsigned long flags; > > + > > + spin_lock_irqsave(&bgc->lock, flags); > > + > > + saved_regs.int_mask = dwapb_read(gpio, GPIO_INTMASK); > > + saved_regs.int_en = dwapb_read(gpio, GPIO_INTEN); > > + saved_regs.int_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); > > + saved_regs.int_pol = dwapb_read(gpio, GPIO_INT_POLARITY); > > + saved_regs.int_type = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); > > + saved_regs.dir = dwapb_read(gpio, GPIO_SWPORTA_DDR); > > + saved_regs.data = dwapb_read(gpio, GPIO_SWPORTA_DR); > > Hello, > > The DesignWare GPIO IP can be configured to have ports a, b, c, and d. So you > will need to save and restore any ports that are present. I think that *some* > configurations of the IP include a register that can tell us how it was configured, > but that register is also optional :) I don't have confidence that we can > read/write the registers blindly whether they are known to be there or not. > So you may be stuck with looking at the device tree or platform data to know > whether banks b, c, or d exist. > >From the code, the device node has one property for port index. If the index is '0', then it is port A. So I think we can store the status according to the port index. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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