lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:	Wed, 10 Sep 2014 06:41:27 +0200
From:	Juergen Gross <jgross@...e.com>
To:	Toshi Kani <toshi.kani@...com>
CC:	stefan.bader@...onical.com, linux-kernel@...r.kernel.org,
	xen-devel@...ts.xensource.com, konrad.wilk@...cle.com,
	ville.syrjala@...ux.intel.com, hpa@...or.com, x86@...nel.org,
	jbeulich@...e.com, david.vrabel@...rix.com
Subject: Re: [PATCH V2 1/3] x86: Make page cache mode a real type

On 09/09/2014 07:24 PM, Toshi Kani wrote:
> On Mon, 2014-09-08 at 10:01 +0200, Juergen Gross wrote:
>> At the moment there are a lot of places that handle setting or getting
>> the page cache mode by treating the pgprot bits equal to the cache mode.
>> This is only true because there are a lot of assumptions about the setup
>> of the PAT MSR. Otherwise the cache type needs to get translated into
>> pgprot bits and vice versa.
>>
>> This patch tries to prepare for that by introducing a seperate type
>> for the cache mode and adding functions to translate between those and
>> pgprot values.
>>
>> To avoid too much performance penalty the translation between cache mode
>> and pgprot values is done via tables which contain the relevant
>> information.  Write-back cache mode is hard-wired to be 0, all other
>> modes are configurable via those tables. For large pages there are
>> translation functions as the PAT bit is located at different positions
>> in the ptes of 4k and large pages.
>>
>> Signed-off-by: Stefan Bader <stefan.bader@...onical.com>
>> Signed-off-by: Juergen Gross <jgross@...e.com>
>
> I have two minor comments (which I should have caught before)... Other
> wise, the changes look good to me
>
> Reviewed-by: Toshi Kani <toshi.kani@...com>
>
>
>>   /*
>> diff --git a/arch/x86/include/asm/fb.h b/arch/x86/include/asm/fb.h
>> index 2519d06..0902a50 100644
>> --- a/arch/x86/include/asm/fb.h
>> +++ b/arch/x86/include/asm/fb.h
>> @@ -8,8 +8,12 @@
>>   static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
>>   				unsigned long off)
>>   {
>> +	unsigned long prot;
>> +
>> +	prot = pgprot_val(vma->vm_page_prot) & ~_PAGE_CACHE_MASK;
>>   	if (boot_cpu_data.x86 > 3)
>> -		pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
>> +		pgprot_val(vma->vm_page_prot) =
>> +			prot | cachemode2protval(_PAGE_CACHE_MODE_UC);
>
> This should be _PAGE_CACHE_MODE_UC_MINUS as the original code only sets
> the PCD bit.

Okay.

>
>> diff --git a/drivers/video/fbdev/gbefb.c b/drivers/video/fbdev/gbefb.c
>> index 4aa56ba..b1cc7a6 100644
>> --- a/drivers/video/fbdev/gbefb.c
>> +++ b/drivers/video/fbdev/gbefb.c
>> @@ -54,7 +54,8 @@ struct gbefb_par {
>>   #endif
>>   #endif
>>   #ifdef CONFIG_X86
>> -#define pgprot_fb(_prot) ((_prot) | _PAGE_PCD)
>> +#define pgprot_fb(_prot) (((_prot) & ~_PAGE_CACHE_MASK) |	\
>> +			  cachemode2protval(_PAGE_CACHE_MODE_UC))
>
> Ditto.

Yep.


Thanks,

Juergen
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ