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Date:	Tue, 23 Sep 2014 21:00:57 +0200
From:	Maxime Ripard <maxime.ripard@...e-electrons.com>
To:	"David E. Box" <david.e.box@...ux.intel.com>
Cc:	wsa@...-dreams.de, jdelvare@...e.de, arnd@...db.de,
	dianders@...omium.org, u.kleine-koenig@...gutronix.de,
	laurent.pinchart+renesas@...asonboard.com,
	boris.brezillon@...e-electrons.com, maxime.coquelin@...com,
	andrew@...n.ch, sjg@...omium.org, markus.mayer@...aro.org,
	ch.naveen@...sung.com, jacob.jun.pan@...ux.intel.com,
	max.schwarz@...ine.de, mika.westerberg@...ux.intel.com,
	skuribay@...ox.com, Romain.Baeriswyl@...lis.com,
	wenkai.du@...el.com, chiau.ee.chew@...el.com,
	christian.ruppert@...lis.com, alan@...ux.intel.com,
	linux-kernel@...r.kernel.org, linux-i2c@...r.kernel.org
Subject: Re: [PATCH V2] i2c-designware: Add Intel Baytrail PMIC I2C bus
 support

Hi David,

On Tue, Sep 23, 2014 at 11:40:26AM -0700, David E. Box wrote:
> This patch implements an I2C bus sharing mechanism between the host and platform
> hardware on select Intel BayTrail SoC platforms using the X-Powers AXP288 PMIC.
> 
> On these platforms access to the PMIC must be shared with platform hardware. The
> hardware unit assumes full control of the I2C bus and the host must request
> access through a special semaphore. Hardware control of the bus also makes it
> necessary to disable runtime pm to avoid interfering with hardware transactions.
> 
> Signed-off-by: David E. Box <david.e.box@...ux.intel.com>

Sorry for stepping in like this without really knowing your platform,
but wouldn't using the hwspinlock framework make more sense than
hardcoding your own internal functions here?

Thanks,
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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