linux-kernel - Re: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

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Date:	Tue, 30 Sep 2014 15:38:40 +0200
From:	Marek Vasut <marex@...x.de>
To:	"Bean Huo 霍斌斌 (beanhuo)" 
	<beanhuo@...ron.com>
Cc:	"dwmw2@...radead.org" <dwmw2@...radead.org>,
	Brian Norris <computersforpeace@...il.com>,
	"shijie8@...il.com" <shijie8@...il.com>,
	"geert+renesas@...der.be" <geert+renesas@...der.be>,
	"grmoore@...era.com" <grmoore@...era.com>,
	"linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

On Tuesday, September 30, 2014 at 04:47:39 AM, Bean Huo 霍斌斌 (beanhuo) wrote:
> For Micron spi norflash,enables or disables quad I/O
> protocol ,which controled by EVCR(Enhanced
> Volatile Configuration Register) Quad I/O
> protocol bit 7.When EVCR bit 7 is reset to 0,
> the spi norflash will operate in quad I/O following
> the next WRITE ENHANCED VOLATILE CONFIGURATION
> command.

You only do one WRITE ENHANCED VOLATILE CONFIGURATION command in the patch, so
this text doesn't add up.

Try something like this:
-->8--
This patch adds code which enables Quad I/O mode on Micron SPI NOR
flashes.

For Micron SPI NOR flash, enabling or disabling quad I/O protocol
is controled by EVCR (Enhanced Volatile Configuration Register),
Quad I/O protocol bit 7. When EVCR bit 7 is reset to 0, the SPI
NOR flash will operate in quad I/O mode.
--8<--

What do you think ?

Brian, am I bitching too much about pointless things ? Please stop me if you 
think I do.

[...]

Best regards,
Marek Vasut
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