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Date: Fri, 10 Oct 2014 12:08:27 +0200
From: Arnd Bergmann <arnd@...db.de>
To: Scott Branden <sbranden@...adcom.com>
Cc: Christian Daudt <bcm@...thebug.org>,
Matt Porter <mporter@...aro.org>,
Russell King <linux@....linux.org.uk>,
bcm-kernel-feedback-list@...adcom.com,
Mike Turquette <mturquette@...aro.org>,
Alex Elder <elder@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Andrew Morton <akpm@...ux-foundation.org>,
"David S. Miller" <davem@...emloft.net>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Joe Perches <joe@...ches.com>,
Mauro Carvalho Chehab <m.chehab@...sung.com>,
Antti Palosaari <crope@....fi>,
JD Zheng <jdzheng@...adcom.com>, Ray Jui <rjui@...adcom.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org,
Jonathan Richardson <jonathar@...adcom.com>
Subject: Re: [PATCH V4 5/7] ARM: dts: Enable Broadcom Cygnus SoC
On Thursday 09 October 2014 15:44:29 Scott Branden wrote:
> +
> + lcpll: lcpll@...1d02c {
> + #clock-cells = <0>;
> + compatible = "brcm,cygnus-lcpll-clk";
> + reg = <0x0301d02c 0x1c>;
> + clocks = <&osc>;
> + };
> +
> + genpll: genpll@...1d000 {
> + #clock-cells = <0>;
> + compatible = "brcm,cygnus-genpll-clk";
> + reg = <0x0301d000 0x2c>,
> + <0x180AA024 0x4>,
> + <0x0301C020 0x4>;
> + clocks = <&osc>;
> + };
> +
To be honest, I'm not too happy about the way you specify a single
register for each clock as a global 'reg' property.
Presumably each of these registers is part of an IP block that does
multiple things, so it would be better to start out with a binding
for each IP block. How many of these blocks are used for clocks, and
what do they do?
Arnd
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