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Date: Fri, 10 Oct 2014 09:53:08 -0700
From: Doug Anderson <dianders@...omium.org>
To: Kever Yang <kever.yang@...k-chips.com>
Cc: Heiko Stübner <heiko@...ech.de>,
Mike Turquette <mturquette@...aro.org>,
Sonny Rao <sonnyrao@...omium.org>,
Addy Ke <addy.ke@...k-chips.com>,
Eddie Cai <cf@...k-chips.com>, Jianqun Xu <xjq@...k-chips.com>,
han jiang <hj@...k-chips.com>,
Tao Huang <huangtao@...k-chips.com>,
戴克霖 (Jack) <dkl@...k-chips.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
linux-rockchip@...ts.infradead.org,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/2] clk: rockchip: add 400MHz and 500MHz for rk3288
clock rate
Kever
On Thu, Oct 9, 2014 at 9:50 PM, Kever Yang <kever.yang@...k-chips.com> wrote:
> This patch add 400MHz and 500MHz to clock rate table for rk3288.
>
> Signed-off-by: Kever Yang <kever.yang@...k-chips.com>
> ---
>
> Changes in v2:
> - change the PLL setting of 400M to meet the constraints of TRM
>
> drivers/clk/rockchip/clk-rk3288.c | 2 ++
> 1 file changed, 2 insertions(+)
Thanks! These numbers for 400MHz look better.
Reviewed-by: Doug Anderson <dianders@...omium.org>
Tested-by: Doug Anderson <dianders@...omium.org>
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