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Date: Sat, 1 Nov 2014 15:27:57 +0900
From: Chanwoo Choi <cwchoi00@...il.com>
To: Abhilash Kesavan <kesavan.abhilash@...il.com>
Cc: linux-iio@...r.kernel.org, jic23@...nel.org,
Naveen Krishna <naveenkrishna.ch@...il.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] iio: adc: exynos_adc: Add support for ADCv3 on exynos7
Hi Abhilash,
On Sat, Nov 1, 2014 at 1:00 PM, Abhilash Kesavan
<kesavan.abhilash@...il.com> wrote:
> Hi Chanwoo,
>
> On Fri, Oct 31, 2014 at 9:44 PM, Chanwoo Choi <cwchoi00@...il.com> wrote:
>> Hi Abhilash,
>>
>> On Fri, Oct 31, 2014 at 11:01 PM, Abhilash Kesavan
>> <kesavan.abhilash@...il.com> wrote:
>>> Hi Chanwoo,
>>>
>>> Thanks for the quick response.
>>>
>>> On Fri, Oct 31, 2014 at 6:17 PM, Chanwoo Choi <cw00.choi@...sung.com> wrote:
>>>> Hi Abhilash,
>>>>
>>>> On 10/31/2014 09:38 PM, Abhilash Kesavan wrote:
>>>>> The ADC on exynos7 is quite similar to ADCv2. The differences are as
>>>>> follows:
>>>>> - v3 has 8 input channels (10 in v2).
>>>>> - v3 does not include an ADC PHY control register.
>>>>> - Some ADC_CON2 register bits being used in v2 are listed as
>>>>> reserved in v3. This results in a different init_hw function
>>>>> for v3.
>>>>>
>>>>> Signed-off-by: Abhilash Kesavan <a.kesavan@...sung.com>
>>>>> ---
>>>>> - Based on Naveen's "iio: exynos-adc: use syscon instead of ioremap" patchset
>>>>> http://comments.gmane.org/gmane.linux.kernel.iio/13943
>>>>>
>>>>> .../devicetree/bindings/arm/samsung/exynos-adc.txt | 2 ++
>>>>> drivers/iio/adc/exynos_adc.c | 32 ++++++++++++++++++++
>>>>> 2 files changed, 34 insertions(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
>>>>> index c368210..a11e32c 100644
>>>>> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
>>>>> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
>>>>> @@ -14,6 +14,8 @@ Required properties:
>>>>> for exynos4412/5250 and s5pv210 controllers.
>>>>> Must be "samsung,exynos-adc-v2" for
>>>>> future controllers.
>>>>> + Must be "samsung,exynos-adc-v3" for
>>>>> + the ADC in Exynos7 and compatibles
>>>>
>>>> I prefer to use 'exynos7-adc' instead of 'exynos-adc-v3'.
>>>> Exynos7 has little different from existing ADCv2.
>>>
>>> Sure, I'll change it. The reason for my choosing v3 was that reading
>>> the version register (0x20 offset) showed a value of 0x80000009 in
>>> Exynos7 as against 0x80000008 in both 5420 and 3250.
>>>>
>>>> Also, If you want to use 'exynos-adc-v3' compatible,
>>>> Exynos7's TRM have to include the correct version(v3) infromation.
>>>
>>> I could not see any mention of the ADC controller version in the
>>> Exynos7 UM other than the version register. Does that mean it is v2 ?
>>
>> So am I. I don't see any version number of ADC in Exynos TRM.
> OK, considering the small differences between ADCv2 and this
> controller, I will change the compatible to exynos7-adc.
> Patch will be posted in a bit.
>>
>> Additionally,
>> I have a question about Exynos7. If you possible,
>> did you tell me about full name of Exynos7 SoC (e.g., Exynos5433, Exynos52..)?
> The soc name is Exynos7 and it has 4 A57 cores.
I wondered what is Exynos7. Thanks for your reply.
Best Regards,
Chanwoo Choi
>>
>> Best Regards,
>> Chanwoo Choi
>>
>>>
>>> Regards,
>>> Abhilash
>>>>
>>>> Thanks,
>>>> Chanwoo Choi
>>>>
>>>>
>>>>
>>>>> Must be "samsung,exynos3250-adc" for
>>>>> controllers compatible with ADC of Exynos3250.
>>>>> Must be "samsung,s3c2410-adc" for
>>>>> diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
>>>>> index fe03177..74d0a9d 100644
>>>>> --- a/drivers/iio/adc/exynos_adc.c
>>>>> +++ b/drivers/iio/adc/exynos_adc.c
>>>>> @@ -390,6 +390,35 @@ static const struct exynos_adc_data exynos3250_adc_data = {
>>>>> .start_conv = exynos_adc_v2_start_conv,
>>>>> };
>>>>>
>>>>> +static void exynos_adc_v3_init_hw(struct exynos_adc *info)
>>>>> +{
>>>>> + u32 con1, con2;
>>>>> +
>>>>> + if (info->data->needs_adc_phy)
>>>>> + regmap_write(info->pmu_map, info->data->phy_offset, 1);
>>>>> +
>>>>> + con1 = ADC_V2_CON1_SOFT_RESET;
>>>>> + writel(con1, ADC_V2_CON1(info->regs));
>>>>> +
>>>>> + con2 = readl(ADC_V2_CON2(info->regs));
>>>>> + con2 &= ~ADC_V2_CON2_C_TIME(7);
>>>>> + con2 |= ADC_V2_CON2_C_TIME(0);
>>>>> + writel(con2, ADC_V2_CON2(info->regs));
>>>>> +
>>>>> + /* Enable interrupts */
>>>>> + writel(1, ADC_V2_INT_EN(info->regs));
>>>>> +}
>>>>> +
>>>>> +static const struct exynos_adc_data exynos_adc_v3_data = {
>>>>> + .num_channels = MAX_ADC_V1_CHANNELS,
>>>>> + .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
>>>>> +
>>>>> + .init_hw = exynos_adc_v3_init_hw,
>>>>> + .exit_hw = exynos_adc_v2_exit_hw,
>>>>> + .clear_irq = exynos_adc_v2_clear_irq,
>>>>> + .start_conv = exynos_adc_v2_start_conv,
>>>>> +};
>>>>> +
>>>>> static const struct of_device_id exynos_adc_match[] = {
>>>>> {
>>>>> .compatible = "samsung,s3c2410-adc",
>>>>> @@ -413,6 +442,9 @@ static const struct of_device_id exynos_adc_match[] = {
>>>>> .compatible = "samsung,exynos-adc-v2",
>>>>> .data = &exynos_adc_v2_data,
>>>>> }, {
>>>>> + .compatible = "samsung,exynos-adc-v3",
>>>>> + .data = &exynos_adc_v3_data,
>>>>> + }, {
>>>>> .compatible = "samsung,exynos3250-adc",
>>>>> .data = &exynos3250_adc_data,
>>>>> },
>>>>>
>>>>
>>> --
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