linux-kernel - Re: [PATCH v2 0/2] pinctrl: Intel Cherryview/Braswell support

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Date:	Wed, 5 Nov 2014 13:44:24 -0800
From:	Olof Johansson <olof@...om.net>
To:	Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc:	Linus Walleij <linus.walleij@...aro.org>,
	Alexandre Courbot <gnurou@...il.com>,
	Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
	Mathias Nyman <mathias.nyman@...ux.intel.com>,
	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	Ning Li <ning.li@...el.com>, Alan Cox <alan@...ux.intel.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 0/2] pinctrl: Intel Cherryview/Braswell support

Hi,



On Mon, Nov 3, 2014 at 3:01 AM, Mika Westerberg
<mika.westerberg@...ux.intel.com> wrote:
> Hi,
>
> This is second version of the patch series adding pinctrl/GPIO support
> for Intel Braswell and Cherrryview. The previous version can be found here:
>
> https://lkml.org/lkml/2014/10/27/118
>
> I've dropped patches [2/4] and [3/4] as they are already applied to the
> pinctrl tree.
>
> Changes to the previous version:
>
> [1/2] - Removed unnecessary cast and added Rafael's ACK.
>
> [2/2] - Use Ohms instead of kOhms in pin configuration.
>       - Change chv_config_set_pull() to be not so convoluted.
>       - Remove locking when we just read single register. This is not needed.
>       - Use BIT() instead of (1 << something)
>
> Mika Westerberg (2):
>   gpio / ACPI: Add knowledge about pin controllers to acpi_get_gpiod()
>   pinctrl: Add Intel Cherryview/Braswell pin controller support


Pinctrl setup has traditionally always been done by firmware on x86,
and some ARM platforms are again moving back to that state (since
reconfiguring pinctrl in the kernel is in some cases not safe).

What's the purpose of exposing this to the kernel on x86 now? I can
see the need to expose GPIO, but not pinctrl? Having the pin control
hidden away in firmware has been one of the benefits on x86, and
you're now undoing it... :)



-Olof
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