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Date: Tue, 11 Nov 2014 13:59:47 +0800
From: Jisheng Zhang <jszhang@...vell.com>
To: "tglx@...utronix.de" <tglx@...utronix.de>,
"jason@...edaemon.net" <jason@...edaemon.net>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 0/3] irqchip: dw-apb-ictl: IRQ_GC_MASK_CACHE_PER_TYPE
and PM support
Dear Thomas, Jason,
Is there any potential issue with this patch serials I need to resolve?
Thanks in advance,
Jisheng
On Mon, 22 Sep 2014 23:34:57 -0700
Jisheng Zhang <jszhang@...vell.com> wrote:
> These patches try to improve dw-apb-ictl irqchip driver a bit.
>
> The first patch does a bit clean up work -- unify the register access usage.
>
> The two dw-apb-ictl's irq_chip_type instances have separate mask registers,
> so the second patch enables IRQ_GC_MASK_CACHE_PER_TYPE.
>
> The last patch adds suspend/resume support to the driver.
>
> Tested on Marvell BG2Q-DMP board.
>
> Jisheng Zhang (3):
> irqchip: dw-apb-ictl: always use use {readl|writel}_relaxed
> irqchip: dw-apb-ictl: enable IRQ_GC_MASK_CACHE_PER_TYPE
> irqchip: dw-apb-ictl: add PM support
>
> drivers/irqchip/irq-dw-apb-ictl.c | 32 ++++++++++++++++++++++++++------
> 1 file changed, 26 insertions(+), 6 deletions(-)
>
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