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Date: Mon, 10 Nov 2014 16:03:06 -0800
From: Tony Lindgren <tony@...mide.com>
To: Kevin Hilman <khilman@...nel.org>
Cc: Nishanth Menon <nm@...com>, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-omap@...r.kernel.org,
Tero Kristo <t-kristo@...com>
Subject: Re: [PATCH] ARM: OMAP4+: PM: Program CPU logic power state
* Kevin Hilman <khilman@...nel.org> [141024 11:04]:
> Nishanth Menon <nm@...com> writes:
>
> > CPU logic power state is never programmed in either the initialization
> > or the suspend/resume logic, instead, we depend on mpuss to program this
> > properly. However, this leaves CPU logic power state indeterminate and
> > most probably in reset configuration (If bootloader or other similar
> > software have'nt monkeyed with the register). This can make powerstate=
> > RET be either programmed for CSWR (logic=ret) or OSWR(logic = OFF) and
> > in OSWR, there can be context loss when the code does not expect it.
> >
> > To prevent all these confusions, just support clearly ON, INA, CSWR,
> > OFF which is the intent of the existing code by explicitly programming
> > logic state.
> >
> > NOTE: since this is a hot path (using in cpuidle), the exit path just
> > programs powerstate (logic state is immaterial when powerstate is ON).
> >
> > Without doing this, we end up with lockups when CPUs enter OSWR and
> > multiple blocks loose context, when we expect them to hit CSWR.
> >
> > Signed-off-by: Nishanth Menon <nm@...com>
>
> Acked-by: Kevin Hilman <khilman@...aro.org>
Applying into omap-for-v3.19/soc thanks.
Tony
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