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Date:	Thu, 13 Nov 2014 21:20:26 +0800
From:	Kever Yang <kever.yang@...k-chips.com>
To:	Mike Turquette <mturquette@...aro.org>,
	Heiko Stuebner <heiko@...ech.de>
Cc:	dianders@...omium.org, sonnyrao@...omium.org,
	addy.ke@...k-chips.com, cf@...k-chips.com, dkl@...k-chips.com,
	huangtao@...k-chips.com, linux-rockchip@...ts.infradead.org,
	Kever Yang <kever.yang@...k-chips.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Simon Horman <horms+renesas@...ge.net.au>,
	Laurent Pinchart <laurent.pinchart@...asonboard.com>,
	Sylwester Nawrocki <s.nawrocki@...sung.com>,
	Gerhard Sittig <gsi@...x.de>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Ben Dooks <ben.dooks@...ethink.co.uk>,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [RFC PATCH 2/2] dt-bindings: clk: add document for assigned-clock-force-rates usage

This patch adds document for how to use the opetion property
assigned-clock-force-rates.

We may use this property to force update a clock setting.

Signed-off-by: Kever Yang <kever.yang@...k-chips.com>
---

 Documentation/devicetree/bindings/clock/clock-bindings.txt | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/clock-bindings.txt b/Documentation/devicetree/bindings/clock/clock-bindings.txt
index 06fc6d5..fb5d3a5 100644
--- a/Documentation/devicetree/bindings/clock/clock-bindings.txt
+++ b/Documentation/devicetree/bindings/clock/clock-bindings.txt
@@ -154,11 +154,14 @@ set to 0, or can be omitted if it is not followed by any non-zero entry.
 
         assigned-clocks = <&clkcon 0>, <&pll 2>;
         assigned-clock-parents = <&pll 2>;
+        assigned-clock-force-rates = <500000>, <0>;
         assigned-clock-rates = <0>, <460800>;
     };
 
-In this example the <&pll 2> clock is set as parent of clock <&clkcon 0> and
-the <&pll 2> clock is assigned a frequency value of 460800 Hz.
+In this example the <&pll 2> clock is set as parent of clock <&clkcon 0>,
+the <&clkcon 0> clock is assigned a frequency value of 500000 Hz and make
+sure the we get into assigned-clock-rates even if there is no rate change,
+and the <&pll 2> clock is assigned a frequency value of 460800 Hz.
 
 Configuring a clock's parent and rate through the device node that consumes
 the clock can be done only for clocks that have a single user. Specifying
-- 
1.9.1

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