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Date:	Fri, 21 Nov 2014 08:05:54 +0100
From:	Wolfram Sang <wsa@...-dreams.de>
To:	Andrew Jackson <Andrew.Jackson@....com>
Cc:	Andrew Morton <akpm@...ux-foundation.org>,
	Baruch Siach <baruch@...s.co.il>,
	"Du, Wenkai" <wenkai.du@...el.com>,
	Shinya Kuribayashi <skuribay@...ox.com>,
	Romain Baeriswyl <Romain.Baeriswyl@...lis.com>,
	linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org,
	Liviu Dudau <Liviu.Dudau@....com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] i2c: designware: prevent early stop on TX FIFO empty

On Fri, Nov 07, 2014 at 12:10:44PM +0000, Andrew Jackson wrote:
> If the Designware core is configured with IC_EMPTYFIFO_HOLD_MASTER_EN
> set to zero, allowing the TX FIFO to become empty causes a STOP
> condition to be generated on the I2C bus. If the transmit FIFO
> threshold is set too high, an erroneous STOP condition can be
> generated on long transfers - particularly where the interrupt
> latency is extended.
> 
> Signed-off-by: Andrew Jackson <Andrew.Jackson@....com>
> Signed-off-by: Liviu Dudau <Liviu.Dudau@....com>

Applied to for-current, thanks!


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