linux-kernel - Re: [PATCH 2/3] MIPS: Add full ISA emulator.

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Wed, 3 Dec 2014 16:52:02 -0800
From:	Leonid Yegoshin <Leonid.Yegoshin@...tec.com>
To:	David Daney <ddaney@...iumnetworks.com>
CC:	David Daney <ddaney.cavm@...il.com>, <linux-mips@...ux-mips.org>,
	<ralf@...ux-mips.org>, <Zubair.Kakakhel@...tec.com>,
	<geert+renesas@...der.be>, <peterz@...radead.org>,
	<paul.gortmaker@...driver.com>, <macro@...ux-mips.org>,
	<chenhc@...ote.com>, <cl@...ux.com>, <mingo@...nel.org>,
	<richard@....at>, <zajec5@...il.com>, <james.hogan@...tec.com>,
	<keescook@...omium.org>, <tj@...nel.org>, <alex@...x-smith.me.uk>,
	<pbonzini@...hat.com>, <blogic@...nwrt.org>,
	<paul.burton@...tec.com>, <qais.yousef@...tec.com>,
	<linux-kernel@...r.kernel.org>, <markos.chandras@...tec.com>,
	<dengcheng.zhu@...tec.com>, <manuel.lauss@...il.com>,
	<lars.persson@...s.com>, David Daney <david.daney@...ium.com>
Subject: Re: [PATCH 2/3] MIPS: Add full ISA emulator.

On 12/03/2014 04:20 PM, David Daney wrote:
> On 12/03/2014 03:55 PM, Leonid Yegoshin wrote:
>> On 12/03/2014 03:44 PM, David Daney wrote:
>>
>> (...)
>>
>> Big work
>
> Not really, although by number of lines of code, it is about 3x the 
> size of your patch, it only touches the existing code in one place.  
> It only took about 3 days to write, adding full MIPS64 and R6 support 
> would probably be less than another week of work.
>
> microMIPS I haven't looked at as we don't have anything to test it on.
>
>> but it doesn't support customized instructions,
>
> GCC will never put these in the delay slot of a FPU branch, so it is 
> not needed.

I doubt that it is correct in all situations and with any GCC parameter 
combination.

Never say never, if it is about toolchain. IMG Arch team was assured 
that branch likely are never used and removed it in MIPS R6, but BGEZL 
(or so) was a first which I hit then I ran GLIBC.

Besides GCC there are LLVM and another JITs.

>
>> multiple ASEs,
>
> Same as above.  But any instructions that are deemed necessary can 
> easily be added.
>
>> MIPS R6
>
> It is a proof of concept.  R6 can easily be added if needed.
>
> Your XOL emulation doesn't handle R6 either, so this is no worse than 
> your patch in that respect.

You probably didn't research it well. A lot of changes in 
arch/mips/kernel/branch.c and and arch/mips/math-emu/cp1emu.c, all of it 
related with R6.

>
>> etc.
>
> GCC will never put trapping instructions in the delay slot either.

It seems like it is not correct and requires a more accurate statement. 
FPU instructions may trap, LWL and LWR traps on R6 with RI, etc. Yes, 
there are restrictions but basing a kernel on that assumptions is 
unsafe. The only safe is HW architecture document.

Finally, there is a manual encoding too.

>
> All we have to support are non-trapping and non-branch/jump 
> instructions from the ISA manuals that can be executed from userspace 
> processes. That makes it slightly simpler than complete ISA emulation.
>
>>
>> Well, it is still not a replacement of XOL emulation.
>
> For use by the FPU emulator, it is probably good enough
>
>> Even close.
>
> I disagree, that is why I took the time to do it.
>
>>
>>
>

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/