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Date: Tue, 23 Dec 2014 11:46:22 +0800 From: Liu Ying <Ying.Liu@...escale.com> To: <dri-devel@...ts.freedesktop.org> CC: <devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>, <linux@....linux.org.uk>, <kernel@...gutronix.de>, <p.zabel@...gutronix.de>, <thierry.reding@...il.com>, <shawn.guo@...aro.org>, <mturquette@...aro.org>, <airlied@...ux.ie>, <andyshrk@...il.com>, <linux-kernel@...r.kernel.org> Subject: [PATCH RFC v3 01/18] clk: divider: Correct parent clk round rate if no bestdiv is normally found If no best divider is normally found, we will try to use the maximum divider. We should not set the parent clock rate to be 1Hz by force for being rounded. Instead, we should take the maximum divider as a base and calculate a correct parent clock rate for being rounded. Signed-off-by: Liu Ying <Ying.Liu@...escale.com> --- v2->v3: * None. v1->v2: * None. drivers/clk/clk-divider.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index c0a842b..f641d4b 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -311,7 +311,8 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate, if (!bestdiv) { bestdiv = _get_maxdiv(divider); - *best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1); + *best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), + MULT_ROUND_UP(rate, bestdiv)); } return bestdiv; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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